2006 |
17 | | Nicolas Abel,
Lounis Kessal,
Sébastien Pillement,
Didier Demigny:
Clear Stream towards Dynamically Reconfigurable Systems on Chip.
ReCoSoC 2006: 98-104 |
2005 |
16 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert,
Gaston Cambon,
Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce.
Technique et Science Informatiques 24(6): 725-755 (2005) |
2004 |
15 | | Nicolas Abel,
Lounis Kessal,
Didier Demigny:
Design flexibility using fpga dynamical reconfiguration.
ICIP 2004: 2821-2824 |
14 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Didier Demigny,
Michel Robert,
Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability.
SAMOS 2004: 128-137 |
2003 |
13 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert,
Gaston Cambon,
Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.
FPL 2003: 722-732 |
12 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Didier Demigny,
Michel Robert,
Gaston Cambon:
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability.
IPDPS 2003: 176 |
11 | EE | Lounis Kessal,
Nicolas Abel,
Didier Demigny:
Real-time image processing with dynamically reconfigurable architecture.
Real-Time Imaging 9(5): 297-313 (2003) |
2002 |
10 | EE | Didier Demigny:
On optimal linear filtering for edge detection.
IEEE Transactions on Image Processing 11(7): 728-737 (2002) |
2001 |
9 | | P. Lamaty,
B. Mazar,
Didier Demigny,
Lounis Kessal,
M. Karabernou:
Two ASIC for Low and Middle Levels of Real Time Image Processing.
VLSI-SOC 2001: 3-14 |
8 | | Didier Demigny,
Lounis Kessal,
J. Pons:
Fast Recursive Implementation of the Gaussian Filter.
VLSI-SOC 2001: 39-49 |
7 | | Lounis Kessal,
R. Bourguiba,
Didier Demigny,
N. Boudouani,
M. Karabernou:
Reconfigurable Architecture Using High Speed FPGA.
VLSI-SOC 2001: 75-86 |
2000 |
6 | EE | Didier Demigny,
Lounis Kessal,
R. Bourguiba,
N. Boudouani:
How to Use High Speed Reconfigurable FPGA for Real Time Image Processing?
CAMP 2000: 240- |
5 | | Lounis Kessal,
Didier Demigny,
N. Boudouani,
R. Bourgiba:
Reconfigurable Hardware for Real Time Image Processing.
ICIP 2000 |
1998 |
4 | | Didier Demigny:
Extension of Canny's Discrete Criteria to Second Derivative Filters Towards a Unified Approach.
ICIP (2) 1998: 520-524 |
1997 |
3 | EE | F. G. Lorca,
Lounis Kessal,
Didier Demigny:
Efficient ASIC and FPGA Implementations of IIR Filters for Real Time Edge Detection.
ICIP (2) 1997: 406-409 |
2 | | Didier Demigny,
Tawfik Kamlé:
A Discrete Expression of Canny's Criteria for Step Edge Detector Performances Evaluation.
IEEE Trans. Pattern Anal. Mach. Intell. 19(11): 1199-1211 (1997) |
1995 |
1 | EE | Didier Demigny,
F. G. Lorca,
Lounis Kessal:
Evaluation of edge detectors performances with a discrete expression of Canny's criteria.
ICIP 1995: 2169-2172 |