2008 |
19 | EE | Diego Puschini,
Fabien Clermidy,
Pascal Benoit,
Gilles Sassatelli,
Lionel Torres:
Convergence analysis of run-time distributed optimization on adaptive systems using game theory.
FPL 2008: 555-558 |
18 | EE | Nicolas Saint-Jean,
Gilles Sassatelli,
Pascal Benoit,
Lionel Torres,
Michel Robert:
Bio-inspiration helps computers: A new machine.
FPL 2008: 697-698 |
17 | EE | Nicolas Saint-Jean,
Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert:
MPI-Based Adaptive Task Migration Support on the HS-Scale System.
ISVLSI 2008: 105-110 |
16 | EE | Diego Puschini,
Fabien Clermidy,
Pascal Benoit,
Gilles Sassatelli,
Lionel Torres:
Temperature-Aware Distributed Run-Time Optimization on MP-SoC Using Game Theory.
ISVLSI 2008: 375-380 |
2007 |
15 | | Gilles Sassatelli,
Manfred Glesner,
Christophe Bobda,
Pascal Benoit:
Proceedings of the 3rd International Workshop on Reconfigurable Communication-centric Systems-on-Chip, ReCoSoC 2007, Montpellier, France, June 2007
Univ. Montpellier II 2007 |
14 | EE | Gilles Sassatelli,
Nicolas Saint-Jean,
Pascal Benoit,
Lionel Torres,
Michel Robert,
Cristiane R. Woszezenki,
Ismael Grehs,
Fernando Gehm Moraes:
Run-time mapping and communication strategies for Homogeneous NoC-Based MPSoCs.
FCCM 2007: 295-296 |
13 | EE | Nicolas Saint-Jean,
Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert:
Application Case Studies on HS-Scale, a MP-SOC for Embbeded Systems.
ICSAMOS 2007: 88-95 |
12 | EE | Nicolas Saint-Jean,
Gilles Sassatelli,
Pascal Benoit,
Lionel Torres,
Michel Robert:
HS-Scale: a Hardware-Software Scalable MP-SOC Architecture for embedded Systems.
ISVLSI 2007: 21-28 |
11 | | Nicolas Saint-Jean,
Camille Jalier,
Gilles Sassatelli,
Pascal Benoit,
Lionel Torres,
Michel Robert:
HS Scale: A run-time adaptable MP-SoC architecture.
ReCoSoC 2007: 39-46 |
2006 |
10 | EE | Pascal Benoit,
Lionel Torres,
Gilles Sassatelli,
Michel Robert,
Gaston Cambon,
Jürgen Becker:
Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager.
ISVLSI 2006: 251-256 |
2005 |
9 | EE | Pascal Benoit,
Lionel Torres,
Gilles Sassatelli,
Michel Robert,
Gaston Cambon:
Dynamic hardware multiplexing for coarse grain reconfigurable architectures.
FPGA 2005: 270 |
8 | | Pascal Benoit,
Jürgen Becker,
Michel Robert,
Lionel Torres,
Gilles Sassatelli,
Gaston Cambon:
Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors.
FPL 2005: 703-706 |
7 | EE | Pascal Benoit,
Lionel Torres,
Gilles Sassatelli,
Michel Robert,
Gaston Cambon:
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures.
IPDPS 2005 |
6 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert,
Gaston Cambon,
Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce.
Technique et Science Informatiques 24(6): 725-755 (2005) |
2004 |
5 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Didier Demigny,
Michel Robert,
Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability.
SAMOS 2004: 128-137 |
2003 |
4 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Michel Robert,
Gaston Cambon,
Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring.
FPL 2003: 722-732 |
3 | EE | Pascal Benoit,
Gilles Sassatelli,
Lionel Torres,
Didier Demigny,
Michel Robert,
Gaston Cambon:
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability.
IPDPS 2003: 176 |
2002 |
2 | EE | Gilles Sassatelli,
Lionel Torres,
Pascal Benoit,
Thierry Gil,
Camille Diou,
Gaston Cambon,
Jérôme Galy:
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications.
DATE 2002: 553-558 |
2001 |
1 | | Gilles Sassatelli,
Lionel Torres,
Pascal Benoit,
Gaston Cambon,
Michel Robert,
Jérôme Galy:
Dynamically Reconfigurable Architectures for Digital Signal Processing Applications.
VLSI-SOC 2001: 63-74 |