| 2007 |
|---|
| 9 | EE | AbdelHalim Samahi,
El-Bay Bourennane:
Automated Integration and Communication Synthesis of Reconfigurable MPSoC Platform.
AHS 2007: 379-385 |
| 2005 |
|---|
| 8 | | AbdelHalim Samahi,
Sami Boukhechem,
El-Bay Bourennane,
Nasser E. Idirene:
STARSoC : A C-based platform for rapid prototyping of embedded system.
ReCoSoC 2005: 177-182 |
| 2004 |
|---|
| 7 | | Sophie Bouchoux,
El-Bay Bourennane,
Michel Paindavoine:
Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA.
ICIP 2004: 2841-2844 |
| 6 | EE | Sophie Bouchoux,
El-Bay Bourennane,
Johel Mitéran,
Michel Paindavoine:
Implementation of JPEG2000 Arithmetic Decoder on a Dynamically Reconfigurable ATMEL FPGA.
ISVLSI 2004: 237-238 |
| 2003 |
|---|
| 5 | EE | Johel Mitéran,
Sebastien Bouillant,
El-Bay Bourennane:
Classification Boundary Approximation by Using Combination of Training Steps for Real-Time Image Segmentation.
MLDM 2003: 141-155 |
| 4 | EE | Johel Mitéran,
Sebastien Bouillant,
El-Bay Bourennane:
SVM approximation for real-time image segmentation by using an improved hyperrectangles-based method.
Real-Time Imaging 9(3): 179-188 (2003) |
| 2002 |
|---|
| 3 | EE | El-Bay Bourennane,
Claude Milan,
Michel Paindavoine,
Sophie Bouchoux:
Real Time Image Rotation Using Dynamic Reconfiguration.
Real-Time Imaging 8(4): 277-289 (2002) |
| 1998 |
|---|
| 2 | | Cyril Berthaud,
El-Bay Bourennane,
Michel Paindavoine,
Claude Milan:
Implementation of a Real Time Image Rotation using B-Spline Interpolation on FPGA's Board.
ICIP (3) 1998: 995-999 |
| 1 | EE | Lionel Torres,
El-Bay Bourennane,
Michel Robert,
Michel Paindavoine:
A Recursive Digital Filter Implementation for Noisy and Blurred Images.
Real-Time Imaging 4(3): 181-191 (1998) |
