| 2007 |
|---|
| 10 | EE | Daniel Mesquita,
Benoît Badrignans,
Lionel Torres,
Gilles Sassatelli,
Michel Robert,
Fernando Moraes:
A Cryptographic Coarse Grain Reconfigurable Architecture Robust Against DPA.
IPDPS 2007: 1-8 |
| 2006 |
|---|
| 9 | EE | Daniel Mesquita,
Benoît Badrignans,
Lionel Torres,
Gilles Sassatelli,
Michel Robert,
Jean-Claude Bajard,
Fernando Gehm Moraes:
A Leak Resistant Architecture Against Side Channel Attacks.
FPL 2006: 1-4 |
| 8 | | Benoît Badrignans,
Daniel Mesquita,
Jean-Claude Bajard,
Lionel Torres,
Gilles Sassatelli,
Michel Robert:
A Parallel and Secure Architecture for Asymmetric Cryptography.
ReCoSoC 2006: 220-224 |
| 7 | | Viktor Fischer,
Lionel Torres,
Daniel Mesquita:
Flexible security and its technology limits.
ReCoSoC 2006: 243-248 |
| 2005 |
|---|
| 6 | | Daniel Mesquita,
Jean-Denis Techer,
Lionel Torres,
Gilles Sassatelli,
Gaston Cambon,
Michel Robert,
Fernando Moraes:
A new hardware countermeasure for masking power signatures of crypto cores.
ReCoSoC 2005: 169-176 |
| 5 | EE | Daniel Mesquita,
Jean-Denis Techer,
Lionel Torres,
Gilles Sassatelli,
Gaston Cambon,
Michel Robert,
Fernando Moraes:
Current mask generation: a transistor level security against DPA attacks.
SBCCI 2005: 115-120 |
| 4 | EE | Daniel Mesquita,
Jean-Denis Techer,
Lionel Torres,
Michel Robert,
Guy Cathebras,
Gilles Sassatelli,
Fernando Gehm Moraes:
Current Mask Generation: an Analog Circuit to Thwart DPA Attacks.
VLSI-SoC 2005: 317-330 |
| 2003 |
|---|
| 3 | EE | Fernando Gehm Moraes,
Daniel Mesquita,
José Carlos S. Palma,
Leandro Möller,
Ney Laert Vilar Calazans:
Development of a Tool-Set for Remote and Partial Reconfiguration of FPGAs.
DATE 2003: 11122-11123 |
| 2 | EE | Daniel Mesquita,
Fernando Gehm Moraes,
José Palma,
Leandro Möller,
Ney Laert Vilar Calazans:
Remote and Partial Reconfiguration of FPGAs: Tools and Trends.
IPDPS 2003: 177 |
| 1 | | Daniel Mesquita,
Lionel Torres,
Fernando Gehm Moraes,
Gilles Sassatelli,
Michel Robert:
Are coarse grain reconfigurable architectures suitable for cryptography?
VLSI-SOC 2003: 276-281 |
