17th IEEE Symposium on Computer Arithmetic (ARITH-17 2005), 27-29 June 2005, Cape Cod, MA, USA.
IEEE Computer Society 2005, ISBN 0-7695-2366-8 BibTeX
Introduction
Session 1:
Keynote Talk
Session 2:
Multiplication
Session 3:
Round Table
Session 4:
Applications
- Javier D. Bruguera, Tomás Lang:
Floating-Point Fused Multiply-Add: Reduced Latency for Floating-Point Addition.
42-51
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- Sylvie Boldo, Jean-Michel Muller:
Some Functions Computable with a Fused-Mac.
52-58
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- Silvia M. Müller, Christian Jacobi, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong:
The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor.
59-67
Electronic Edition (link) BibTeX
- Vincent Lefèvre:
New Results on the Distance between a Segment and Z2. Application to the Exact Rounding.
68-75
Electronic Edition (link) BibTeX
- Merav Aharoni, Sigal Asaf, Ron Maharik, Ilan Nehama, Ilya Nikulshin, Abraham Ziv:
Solving Constraints on the Invisible Bits of the Intermediate Result for Floating-Point Verification.
76-83
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Session 5:
Panel
Session 6:
Addition
Session 7:
Division
Session 8:
Cryptography and Galois Fields
Session 9:
Number Systems
Session 10:
Function Evaluation and Table Methods,
Part 1
Session 11:
Function Evaluation and Table Methods,
Part 2
Copyright © Sat May 16 22:58:30 2009
by Michael Ley (ley@uni-trier.de)
