| 2007 |
|---|
| 7 | EE | Vineet Wason,
Rajeev Murgai,
William W. Walker:
An Efficient Uncertainty- and Skew-aware Methodology for Clock Tree Synthesis and Analysis.
VLSI Design 2007: 271-277 |
| 2006 |
|---|
| 6 | EE | Chao-Yang Yeh,
Gustavo R. Wilke,
Hongyu Chen,
Subodh M. Reddy,
Hoa-van Nguyen,
Takashi Miyoshi,
William W. Walker,
Rajeev Murgai:
Clock Distribution Architectures: A Comparative Study.
ISQED 2006: 85-91 |
| 2005 |
|---|
| 5 | | Hongyu Chen,
Chao-Yang Yeh,
Gustavo R. Wilke,
Subodh M. Reddy,
Hoa-van Nguyen,
William W. Walker,
Rajeev Murgai:
A sliding window scheme for accurate clock mesh analysis.
ICCAD 2005: 939-946 |
| 4 | EE | H. Ando,
Nestoras Tzartzanis,
William W. Walker:
A Case Study: Power and Performance Improvement of a Chip Multiprocessor for Transaction Processing.
IEEE Trans. VLSI Syst. 13(7): 865-868 (2005) |
| 2004 |
|---|
| 3 | | Makram M. Mansour,
Amit Mehrotra,
William W. Walker,
Amit Narayan:
Analysis techniques for obtaining the steady-state solution of MOS LC oscillators.
ISCAS (5) 2004: 512-515 |
| 2003 |
|---|
| 2 | EE | Nestoras Tzartzanis,
William W. Walker:
A Transparent Voltage Conversion Method and Its Application to a Dual-Supply-Voltage Register File.
ICCD 2003: 107- |
| 1 | EE | Xiao Yan Yu,
Vojin G. Oklobdzija,
William W. Walker:
An efficient transistor optimizer for custom circuits.
ISCAS (5) 2003: 197-200 |
