2005 |
9 | EE | Grace Y. Cho,
Louis G. Johnson,
Michael A. Soderstrand:
Residue number system implementations of complex heterodyne tunable filters.
ISCAS (1) 2005: 548-551 |
2004 |
8 | EE | Grace Y. Cho,
Louis G. Johnson,
Michael A. Soderstrand:
New complex-arithmetic heterodyne filter.
ISCAS (3) 2004: 593-596 |
2003 |
7 | EE | Michael A. Soderstrand:
CSD multipliers for FPGA DSP applications.
ISCAS (5) 2003: 469-472 |
2001 |
6 | EE | Kah-Howe Tan,
Wen Fung-Leong,
S. Kadam,
Michael A. Soderstrand,
Louis G. Johnson:
Public-domain Matlab program to generate highly optimized VHDL for FPGA implementation.
ISCAS (4) 2001: 514-517 |
1999 |
5 | EE | Luis G. Bustamante,
Michael A. Soderstrand:
High-range switched-capacitor tracking filter.
ISCAS (2) 1999: 65-68 |
4 | EE | Michael A. Soderstrand,
L. Gao,
E. McCune:
Maximizing channel capacity in FSK modulation systems.
ISCAS (4) 1999: 552-555 |
1996 |
3 | EE | Richard H. Strandberg,
Luis G. Bustamante,
Vojin G. Oklobdzija,
Michael A. Soderstrand,
Jean-Claude Duc:
Efficient realizations of squaring circuit and reciprocal used in adaptive sample rate notch filters.
VLSI Signal Processing 14(3): 303-309 (1996) |
1995 |
2 | | Michael A. Soderstrand,
Kamal Al-Marayati:
VLSI Implementation of Very-High-Order FIR Filters.
ISCAS 1995: 1436-1439 |
1993 |
1 | | Michael A. Soderstrand,
Diane H. Chu:
Adaptive notch filtering using multi-rate frequency-sampling band-pass filters.
ISCAS 1993: 136-139 |