PACT 2006: Seattle, Washington, USA

• Jeffrey Dean:
  Experiences with MapReduce, an abstraction for large-scale computation. 1
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Multi-core design I

• Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi:
  Architectural support for operating system-driven CMP cache management. 2-12
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• Lisa R. Hsu, Steven K. Reinhardt, Ravishankar R. Iyer, Srihari Makineni:
  Communist, utilitarian, and capitalist cache policies on CMPs: caches as a shared resource. 13-22
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• Rakesh Kumar, Dean M. Tullsen, Norman P. Jouppi:
  Core architecture optimization for heterogeneous chip multiprocessors. 23-32
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Program analysis and optimization

• Abhishek Das, William J. Dally, Peter R. Mattson:
  Compiling for stream processing. 33-42
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• Silvius Rus, Guobin He, Christophe Alias, Lawrence Rauchwerger:
  Region array SSA. 43-52
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• Kyungwoo Lee, Samuel P. Midkiff:
  A two-phase escape analysis for parallel java programs. 53-62
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• Steve Scott:
  Challenges and opportunities in the post single-thread-processor era. 63
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Security and correctness

• Sumeet Kumar, Aneesh Aggarwal:
  Self-checking instructions: reducing instruction redundancy for concurrent error detection. 64-73
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• Lan Gao, Jun Yang, Marek Chrobak, Youtao Zhang, San Nguyen, Hsien-Hsin S. Lee:
  A low-cost memory remapping scheme for address bus protection. 74-83
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• Brian Rogers, Milos Prvulovic, Yan Solihin:
  Efficient data protection for distributed shared memory multiprocessors. 84-94
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Characterizing program behavior

• Ted Huffmire, Timothy Sherwood:
  Wavelet-based phase classification. 95-104
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• Chang-Burm Cho, Tao Li:
  Complexity-based program phase analysis and classification. 105-113
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• Kenneth Hoste, Aashish Phansalkar, Lieven Eeckhout, Andy Georges, Lizy Kurian John, Koen De Bosschere:
  Performance prediction based on inherent program similarity. 114-122
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• Ajay K. Royyuru:
  Deep computing in biology: challenges and progress. 123
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Multi-core design II

• Philip M. Wells, Koushik Chakraborty, Gurindar S. Sohi:
  Hardware support for spin management in overcommitted virtual machines. 124-133
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• Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi, Austen McDonald, Christos Kozyrakis, Kunle Olukotun:
  Testing implementations of transactional memory. 134-143
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• Ilya Ganusov, Martin Burtscher:
  Efficient emulation of hardware prefetchers via event-driven helper threading. 144-153
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Performance profiling and tuning

• Qin Zhao, Joon Edward Sim, Weng-Fai Wong, Larry Rudolph:
  DEP: detailed execution profile. 154-163
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• Nathaniel McIntosh, Sandya Mannarswamy, Robert Hundt:
  Whole-program optimization of global variable layout. 164-172
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• Zhelong Pan, Rudolf Eigenmann:
  Fast, automatic, procedure-level performance tuning. 173-181
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Instruction fetch and control flow

• Andrew Petersen, Andrew Putnam, Martha Mercaldi, Andrew Schwerin, Susan J. Eggers, Steven Swanson, Mark Oskin:
  Reducing control overhead in dataflow architectures. 182-191
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• Chengmo Yang, Alex Orailoglu:
  Power-efficient instruction delivery through trace reuse. 192-201
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• Oliverio J. Santana, Ayose Falcón, Alex Ramírez, Mateo Valero:
  Branch predictor guided instruction decoding. 202-211
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Application-specific optimizations

• Kaushik Rajan, R. Govindarajan:
  Two-level mapping based cache index selection for packet forwarding engines. 212-221
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• Sung-Chul Han, Franz Franchetti, Markus Püschel:
  Program generation for the all-pairs shortest path problem. 222-232
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• Qingda Lu, Sriram Krishnamoorthy, P. Sadayappan:
  Combining analytical and empirical approaches in tuning matrix transposition. 233-242
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• David B. Kirk:
  Processor architecture: too much parallelism? 243
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Out-of-order microarchitecture

• Joseph J. Sharkey, Deniz Balkan, Dmitry Ponomarev:
  Adaptive reorder buffers for SMT processors. 244-253
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• Francisco J. Mesa-Martinez, Michael C. Huang, Jose Renau:
  SEED: scalable, efficient enforcement of dependences. 254-264
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• Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose:
  SPARTAN: speculative avoidance of register allocations to transient values for performance and energy efficiency. 265-274
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Dependences and register allocation

• Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir:
  Overlapping dependent loads with addressless preload. 275-284
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• Ivan D. Baev, Richard E. Hank, David H. Gross:
  Prematerialization: reducing register pressure for free. 285-294
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• Johnnie Birch, Robert A. van Engelen, Kyle A. Gallivan, Yixin Shou:
  An empirical evaluation of chains of recurrences for array dependence testing. 295-304
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