2006 |
23 | EE | Christopher R. Clark,
David E. Schimmel:
Modeling the data-dependent performance of pattern-matching architectures.
FPGA 2006: 73-82 |
22 | EE | Girish N. Patel,
Michael S. Reid,
David E. Schimmel,
Stephen P. DeWeerth:
An asynchronous architecture for modeling intersegmental neural communication.
IEEE Trans. VLSI Syst. 14(2): 97-110 (2006) |
2004 |
21 | EE | Christopher R. Clark,
David E. Schimmel:
Scalable Pattern Matching for High Speed Networks.
FCCM 2004: 249-257 |
2003 |
20 | EE | Christopher R. Clark,
David E. Schimmel:
Efficient Reconfigurable Logic Circuits for Matching Complex Network Intrusion Detection Patterns.
FPL 2003: 956-959 |
19 | EE | Joshua B. Fryman,
Chad Huneycutt,
Hsien-Hsin S. Lee,
Kenneth M. Mackenzie,
David E. Schimmel:
Energy-Efficient Network Memory for Ubiquitous Devices.
IEEE Micro 23(5): 60-70 (2003) |
2002 |
18 | EE | Marc Necker,
Didier Contis,
David E. Schimmel:
TCP-Stream Reassembly and State Tracking in Hardware.
FCCM 2002: 286- |
1998 |
17 | EE | Vivek Garg,
David E. Schimmel:
Hiding Communication Latency in Data Parallel Applications.
IPPS/SPDP 1998: 18-23 |
16 | | David E. Schimmel,
Chryssa Dislis:
Guest Editors' Introduction: Early Modeling and Analysis of Packaged Systems.
IEEE Design & Test of Computers 15(3): 8-9 (1998) |
1997 |
15 | EE | Stephen P. DeWeerth,
Girish N. Patel,
Mario F. Simoni,
David E. Schimmel,
Ronald L. Calabrese:
A VLSI Architecture for Modeling Intersegmental Coordination.
ARVLSI 1997: 182-200 |
14 | | Chirag S. Patel,
Sek M. Chai,
Sudhakar Yalamanchili,
David E. Schimmel:
Power Constrained Design of Multiprocessor Interconnection Networks.
ICCD 1997: 408-416 |
13 | EE | Chirag S. Patel,
Sek M. Chai,
Sudhakar Yalamanchili,
David E. Schimmel:
Power/Performance Trade-offs for Direct Networks.
PCRCW 1997: 231-246 |
12 | EE | Vivek Garg,
David E. Schimmel:
CCSIMD: A Concurrent Communication and Computation Framework for SIMD Machines.
PCRCW 1997: 55-64 |
11 | | Vivek Garg,
David E. Schimmel:
Performance modeling of dense Cholesky factorization on the MasPar MP-2.
Concurrency - Practice and Experience 9(7): 697-719 (1997) |
1996 |
10 | EE | James D. Allen,
David E. Schimmel:
Improving Memory Performance for Indirect Accesses on SIMD Computers.
IPPS 1996: 759-765 |
9 | | Patrick T. Gaughan,
Binh Vien Dao,
Sudhakar Yalamanchili,
David E. Schimmel:
Distributed Deadlock-Free Routing in Faulty, Pipelined, Direct Interconnection Networks.
IEEE Trans. Computers 45(6): 651-665 (1996) |
8 | EE | James D. Allen,
David E. Schimmel:
Issues in the Design of High Performance SIMD Architectures.
IEEE Trans. Parallel Distrib. Syst. 7(8): 818-829 (1996) |
1995 |
7 | | Vivek Garg,
David E. Schimmel:
Architectural Support for Inter-Stream Communication in a MSIMD System.
HPCA 1995: 348-357 |
6 | EE | James D. Allen,
David E. Schimmel:
The impact of pipelining on SIMD architectures.
IPPS 1995: 380-387 |
5 | | Bruce C. Kim,
Abhijit Chatterjee,
Madhavan Swaminathan,
David E. Schimmel:
A Novel Low-Cost Approach to MCM Interconnect Test.
ITC 1995: 184-192 |
1994 |
4 | | James D. Allen,
Patrick T. Gaughan,
David E. Schimmel,
Sudhakar Yalamanchili:
Ariadne - An Adaptive Router for Fault-Tolerant Multicomputers.
ISCA 1994: 278-288 |
3 | | Hatem Sellami,
James D. Allen,
David E. Schimmel,
Sudhakar Yalamanchili:
Simulation of Marked Graphs on SIMD Architectures Using Efficient Memory Management.
MASCOTS 1994: 343-348 |
2 | | Paul J. Bond,
Bruce C. Kim,
Christopher A. Lee,
David E. Schimmel:
A Methodology for Generation and Collection of Multiprocessor Traces.
MASCOTS 1994: 417-418 |
1993 |
1 | | James D. Allen,
Vivek Garg,
David E. Schimmel:
Analysis of Control Parallelism in SIMD Instruction Streams.
SPDP 1993: 383-390 |