2008 |
11 | EE | Fayez Mohamood,
Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
DLL-conscious instruction fetch optimization for SMT processors.
Journal of Systems Architecture - Embedded Systems Design 54(12): 1089-1100 (2008) |
2007 |
10 | EE | Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems.
ICPADS 2007: 1-8 |
9 | EE | Mrinmoy Ghosh,
Hsien-Hsin S. Lee:
Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs.
MICRO 2007: 134-145 |
2006 |
8 | EE | Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Efficient System-on-Chip Energy Management with a Segmented Bloom Filter.
ARCS 2006: 283-297 |
7 | EE | Dong Hyuk Woo,
Mrinmoy Ghosh,
Emre Özer,
Stuart Biles,
Hsien-Hsin S. Lee:
Reducing energy of virtual cache synonym lookup using bloom filters.
CASES 2006: 179-189 |
6 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Laura Falk,
Mrinmoy Ghosh:
An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors.
ISCA 2006: 102-113 |
2005 |
5 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Guofei Gu,
Laura Falk,
Trevor N. Mudge,
Mrinmoy Ghosh:
An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor.
ICAC 2005: 263-273 |
4 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Mrinmoy Ghosh,
Chenghuai Lu,
Alexandra Boldyreva:
High Efficiency Counter Mode Security Architecture via Prediction and Precomputation.
ISCA 2005: 14-24 |
3 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Chenghuai Lu,
Mrinmoy Ghosh:
Towards the issues in architectural support for protection of software execution.
SIGARCH Computer Architecture News 33(1): 6-15 (2005) |
2 | EE | Rajeev Kumar,
Amit Gupta,
B. S. Pankaj,
Mrinmoy Ghosh,
P. P. Chakrabarti:
Post-compilation optimization for multiple gains with pattern matching.
SIGPLAN Notices 40(12): 14-23 (2005) |
2004 |
1 | EE | Weidong Shi,
Hsien-Hsin S. Lee,
Mrinmoy Ghosh,
Chenghuai Lu:
Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems.
IEEE PACT 2004: 123-134 |