23. ICPP 1994:
North Carolina State University,
NC,
USA - Volume 1
Dharma P. Agrawal (Ed.):
Proceedings of the 1994 International Conference on Parallel Processing,
August 15-19,
1994,
North Carolina State University. Volume I:
Architecture. CRC Press,
ISBN 0-8493-2493-9
Interconnection Networks
- Toshihiro Hanawa, Hideharu Amano, Yoshifumi Fujikawa:
Multistage Interconnection Networks with Multiple Outlets.
1-8 BibTeX
- Young-Keun Park, Gyungho Lee:
A High Throughput Packet-Switching Network with Neural Network Controlled Bypass Queueing and Multiplexing.
9-12 BibTeX
- Prasant Mohapatra, Sheldon Wong, Chita R. Das:
Performance Analysis of Combining Multistage Interconnection Networks.
13-16 BibTeX
- Seung-Woo Seo, Tse-Yun Feng:
A General Inside-Out Routing Algorithm for a Class of Rearrangeable Networks.
17-20 BibTeX
- Michael Jurczyk, Thomas Schwederski, R. Born, Howard Jay Siegel, Seth Abraham:
Strategies for the Massively Parallel Simulation of Interconnection Networks.
21-25 BibTeX
Static Networks
Hierarchical Networks
Novel Architectures
Interconnection Networks II
- Fotios K. Liotopoulos, Suresh Chalasani:
Nonblocking Operation of Asymmetrical Clos Networks.
101-108 BibTeX
- Tse-Yun Feng, Yanggon Kim:
A New Tag Scheme and Its Tree Representation for a Shuffle-Exchange Network.
109-112 BibTeX
- B. Park, K. Watson:
On the Rearrangeability of Reverse Shuffle/Exchange Networks.
113-116 BibTeX
- Masashi Sasahara, Jun Terada, Luo Zhou, Kalidou Gaye, Jun-ichi Yamato, Satoshi Ogura, Hideharu Amano:
SNAIL: A Multiprocessor Based on the Simple Serial Synchronized Multistage Interconnection Network Architecture.
117-120 BibTeX
- De-Lei Lee, Kenneth E. Batcher:
On Sorting Multiple Bitonic Sequences.
121-125 BibTeX
Wormhole Routing
Cache I
Communication Issues
Memory Systems
VLSI Based Architechture
Cache II
Multithreading/VLIW
Copyright © Sat May 16 23:21:01 2009
by Michael Ley (ley@uni-trier.de)
