Peter Athanas
List of publications from the DBLP Bibliography Server - FAQ
2009 | ||
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58 | EE | Jürgen Becker, Roger Woods, Peter M. Athanas, Fearghal Morgan: Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings Springer 2009 |
2008 | ||
57 | Brent E. Nelson, Michael J. Wirthlin, Brad L. Hutchings, Peter M. Athanas, Shawn Bohner: Design Productivity for Configurable Computing. ERSA 2008: 57-66 | |
56 | EE | Jorge Suris, Cameron Patterson, Peter Athanas: An efficient run-time router for connecting modules in FPGAS. FPL 2008: 125-130 |
55 | EE | Matthew Shelburne, Cameron Patterson, Peter Athanas, Mark Jones, Brian Martin, Ryan Fong: Metawire: Using FPGA configuration circuitry to emulate a Network-on-Chip. FPL 2008: 257-262 |
2007 | ||
54 | EE | Nicholas J. Macias, Peter M. Athanas: Application of Self-Configurability for Autonomous, Highly-Localized Self-Regulation. AHS 2007: 397-404 |
53 | EE | Tingting Meng, Peter M. Athanas: Collaborative Signal Reinforcement in Sensor Networks. AINA 2007: 519-524 |
52 | EE | Todd B. Fleming, Peter M. Athanas: Collaborative Synchronization for Signal Reinforcement in Sensor Networks. AINA 2007: 861-868 |
51 | Neil Steiner, Peter Athanas: Autonomous Computing Systems: A Proposed Roadmap. ERSA 2007: 220-226 | |
50 | Alex Marschner, Stephen D. Craven, Peter M. Athanas: A Sandbox for Exploring the OpenFire Processor. ERSA 2007: 248-251 | |
49 | Stephen D. Craven, Peter M. Athanas: High-Level Specification of Runtime Reconfigurable Designs. ERSA 2007: 280-283 | |
48 | Neil Steiner, Peter M. Athanas: Autonomous Computing Systems: A Proof-of-Concept. ERSA 2007: 302- | |
47 | EE | Peter M. Athanas, J. Bowen, T. Dunham, Cameron Patterson, J. Rice, Matthew Shelburne, J. Surís, Mark B. Bucciero, Jonathan Graf: Wires On Demand: Run-Time Communication Synthesis for Reconfigurable Computing. FPL 2007: 513-516 |
46 | Todd B. Fleming, Peter M. Athanas: Collaborative Synchronization for Signal Reinforcement in Sensor Networks. Ad Hoc & Sensor Wireless Networks 4(3): 179-198 (2007) | |
2006 | ||
45 | Peter M. Athanas, Jürgen Becker, Gordon J. Brebner, Jürgen Teich: Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006 Internationales Begegnungs- und Forschungszentrum fuer Informatik (IBFI), Schloss Dagstuhl, Germany 2006 | |
44 | EE | Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas: 06141 Abstracts Collection -- Dynamically Reconfigurable Architectures. Dynamically Reconfigurable Architectures 2006 |
43 | EE | Jürgen Becker, Jürgen Teich, Gordon J. Brebner, Peter M. Athanas: 06141 Executive Summary -- Dynamically Reconfigurable Architectures. Dynamically Reconfigurable Architectures 2006 |
42 | EE | Peter M. Athanas: The (empty?) Promise of FPGA Supercomputing. Dynamically Reconfigurable Architectures 2006 |
41 | EE | Stephen D. Craven, Cameron Patterson, Peter M. Athanas: A Methodology for Generating Application-Specific Heterogeneous Processor Arrays. HICSS 2006 |
40 | EE | Anthony J. Mahar, Peter M. Athanas, Stephen D. Craven, Joshua N. Edmison, Jonathan Graf: Design and Characterization of a Hardware Encryption Management Unit for Secure Computing Platforms. HICSS 2006 |
2005 | ||
39 | EE | Deepak Argarwal, Christopher Robert Anderson, Peter M. Athanas: An 8-GHz Ultra Wideband Transceiver Prototyping Testbed. IEEE International Workshop on Rapid System Prototyping 2005: 121-127 |
38 | EE | Neil Steiner, Peter M. Athanas: Hardware-Software Interaction: Preliminary Observations. IPDPS 2005 |
37 | EE | Jing Ma, Peter M. Athanas, Xin-Ming Huang: Incremental Design Methodology for Multimillion-gate Fpgas. Journal of Circuits, Systems, and Computers 14(5): 1015-1026 (2005) |
2004 | ||
36 | Jesse Hunter, Peter Athanas, Cameron Patterson: VTSim: A Virtex-II Device Simulator. ERSA 2004: 297-298 | |
35 | EE | Neil Steiner, Peter M. Athanas: An Alternate Wire Database for Xilinx FPGAs. FCCM 2004: 336-337 |
34 | EE | Jonathan Graf, Peter M. Athanas: A Key Management Architecture for Securing Off-Chip Data Transfers. FPL 2004: 33-42 |
33 | EE | Alexandra Poetter, Jesse Hunter, Cameron Patterson, Peter M. Athanas, Brent E. Nelson, Neil Steiner: JHDLBits: The Merging of Two Worlds. FPL 2004: 414-423 |
32 | EE | Scott J. Harper, Peter M. Athanas: A Security Policy Based upon Hardware Encryption. HICSS 2004 |
2003 | ||
31 | Jing Ma, Peter Athanas: A JBits-Based Incremental Design Environment with Non-Preemptive Refinement for Multi-Million Gate FPGAs. Engineering of Reconfigurable Systems and Algorithms 2003: 118-126 | |
30 | EE | Kiran Puttegowda, Peter Athanas: RSA encryption using Extended Modular Arithmetic on the Quicksilver COSM Adaptive Computing Machine. FCCM 2003: 305-307 |
29 | EE | Ryan J. Fong, Scott J. Harper, Peter M. Athanas: A Versatile Framework for FPGA Field Updates: An Application of Partial Self-Reconfiguation. IEEE International Workshop on Rapid System Prototyping 2003: 117-123 |
28 | EE | Kiran Puttegowda, William Worek, Nicholas Pappas, Anusha Dandapani, Peter Athanas, Allan Dickerman: A Run-Time Reconfigurable System for Gene-Sequence Searching. VLSI Design 2003: 561-566 |
27 | EE | Toomas P. Plaks, Peter M. Athanas: Engineering of Configurable Systems: Guest Editors Foreword. The Journal of Supercomputing 26(2): 107-108 (2003) |
26 | EE | Toomas P. Plaks, Peter M. Athanas: Engineering of Configurable Systems, II Guest Editor's Foreword. The Journal of Supercomputing 26(3): 219-220 (2003) |
25 | EE | Kiran Puttegowda, David I. Lehn, Jae H. Park, Peter M. Athanas, Mark T. Jones: Context Switching in a Run-Time Reconfigurable System. The Journal of Supercomputing 26(3): 239-257 (2003) |
2002 | ||
24 | EE | Peter M. Athanas: Physical Support for Evolution in Reconfigurable Devices. Evolvable Hardware 2002: 7 |
23 | EE | Jonathan E. Scalera, Creed F. Jones III, Maneesh Soni, Mark B. Bucciero, Peter M. Athanas, A. Lynn Abbott, Amitabh Mishra: Reconfigurable Object Detection in FLIR Image Sequences. FCCM 2002: 284-285 |
2000 | ||
22 | EE | Euripides Sotiriades, Apostolos Dollas, Peter Athanas: Hardware-Software Codesign and Parallel Implementation of a Golomb Ruler Derivation Engine. FCCM 2000: 227-235 |
21 | Fadi J. Kurdahi, Nader Bagherzadeh, Peter Athanas, Jose L. Muñoz: Guest Editors' Introduction: Configurable Computing. IEEE Design & Test of Computers 17(1): 17-19 (2000) | |
1999 | ||
20 | EE | Mark Jones, Luke Scharf, Jonathan Scott, Chris Twaddle, Matthew Yaconis, Kuan Yao, Peter Athanas, Brian Schott: Implementing an API for Distributed Adaptive Computing Systems. FCCM 1999: 222- |
19 | EE | Jason R. Hess, David C. Lee, Scott J. Harper, Mark T. Jones, Peter M. Athanas: Implementation and Evaluation of a Prototype Reconfigurable Router. FCCM 1999: 44- |
18 | EE | Steven Swanchara, Peter M. Athanas: A Methodical Approach for Stream-Oriented Configurable Signal Processing. HICSS 1999 |
17 | David C. Lee, Mark T. Jones, Scott F. Midkiff, Peter M. Athanas: Towards Active Hardware. IWAN 1999: 180-187 | |
1998 | ||
16 | EE | Al Walters, Peter Athanas: A Scalable FIR Filter Using 32-bit Floating-Point Complex Arithmetic on a Configurable Computing Machine. FCCM 1998: 333-334 |
15 | EE | Steven Swanchara, Scott J. Harper, Peter M. Athanas: A Stream-Based Configurable Computing Radio Testbed. FCCM 1998: 40-47 |
14 | EE | Rhett D. Hudson, David I. Lehn, Peter M. Athanas: A Run-Time Reconfigurable Engine for Image Interpolation. FCCM 1998: 88-95 |
13 | Bharadwaj Pudipeddi, A. Lynn Abbott, Peter M. Athanas: A Configurable Computing Approach Towards Real-Time Target Tracking. IPPS/SPDP Workshops 1998: 79-84 | |
1997 | ||
12 | EE | Ray A. Bittner, Peter M. Athanas: Computing kernels implemented with a wormhole RTR CCM. FCCM 1997: 98-105 |
11 | EE | Ray A. Bittner, Peter M. Athanas: Wormhole Run-Time Reconfiguration. FPGA 1997: 79-85 |
10 | Brian Kahne, Peter M. Athanas: Stream synthesis for a wormhole run-time reconfigurable platform. FPL 1997: 101-110 | |
1996 | ||
9 | EE | James B. Peterson, Peter M. Athanas: High-speed 2-D convolution with a custom computing machine. VLSI Signal Processing 12(1): 7-19 (1996) |
1995 | ||
8 | EE | Nabeel Shirazi, Al Walters, Peter M. Athanas: Quantitative analysis of floating point arithmetic on FPGA based custom computing machines. FCCM 1995: 155-163 |
7 | Nabeel Shirazi, Peter M. Athanas, A. Lynn Abbott: Implementation of a 2-D Fast Fourier Transform on an FPGA-Based Custom Computing Machine. FPL 1995: 282-292 | |
6 | Ramana V. Rachakonda, Peter M. Athanas, A. Lynn Abbott: High-Speed Region Detection and Labeling Using an FPGA Based Custom Computing Platform. FPL 1995: 86-93 | |
5 | Peter M. Athanas, A. Lynn Abbott: Real-Time Image Processing on a Custom Computing Platform. IEEE Computer 28(2): 16-24 (1995) | |
1994 | ||
4 | Peter M. Athanas, A. Lynn Abbott: Image Processing on a Custom Computing Platform. FPL 1994: 156-167 | |
1993 | ||
3 | Peter M. Athanas, Harvey F. Silverman: Processor Reconfiguration Through Instruction-Set Metamorphosis. IEEE Computer 26(3): 11-18 (1993) | |
1991 | ||
2 | Peter M. Athanas, Harvey F. Silverman: An Adaptive Hardware Machine Architecture and Compiler for Dynamic Processor Reconfiguration. ICCD 1991: 397-400 | |
1 | Peter M. Athanas, Harvey F. Silverman: Amstrong II: A Loosely Coupled Multiprocessor with a Reconfigurable Communications Architecture. IPPS 1991: 385-388 |