Ramaswamy Govindarajan

2007
37	EE	Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao: Single-dimension software pipelining for multidimensional loops. TACO 4(1): (2007)
2005
36	EE	Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Ziang Hu: Improving power efficiency with compiler-assisted cache replacement. J. Embedded Computing 1(4): 487-499 (2005)
2004
35	EE	Hongbo Rong, Zhizhong Tang, Ramaswamy Govindarajan, Alban Douillet, Guang R. Gao: Single-Dimension Software Pipelining for Multi-Dimensional Loops. CGO 2004: 163-174
34	EE	Hongbo Rong, Alban Douillet, Ramaswamy Govindarajan, Guang R. Gao: Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops. CGO 2004: 175-188
2003
33	EE	Guang R. Gao, Kevin B. Theobald, Ramaswamy Govindarajan, Clement Leung, Ziang Hu, Haiping Wu, Jizhu Lu, Juan del Cuvillo, Adeline Jacquet, Vincent Janot, Thomas L. Sterling: Programming Models and System Software for Future High-End Computing Systems: Work-in-Progress. IPDPS 2003: 206
32	EE	Adeline Jacquet, Vincent Janot, Clement Leung, Guang R. Gao, Ramaswamy Govindarajan, Thomas L. Sterling: An Executable Analytical Performance Evaluation Approach for Early Performance Prediction. IPDPS 2003: 268
31	EE	Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Ziang Hu: Compiler-Assisted Cache Replacement: Problem Formulation and Performance Evaluation. LCPC 2003: 77-92
30	EE	Ramaswamy Govindarajan, Hongbo Yang, José Nelson Amaral, Chihong Zhang, Guang R. Gao: Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures. IEEE Trans. Computers 52(1): 4-20 (2003)
2002
29	EE	Hongbo Yang, Ramaswamy Govindarajan, Guang R. Gao, Kevin B. Theobald: Power-Performance Trade-Offs for Energy-Efficient Architectures: A Quantitative Study. ICCD 2002: 174-179
28		Ramaswamy Govindarajan: Instruction Scheduling. The Compiler Design Handbook 2002: 631-688
27	EE	Ramaswamy Govindarajan, Guang R. Gao, Palash Desai: Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks. VLSI Signal Processing 31(3): 207-229 (2002)
2001
26		Ramaswamy Govindarajan, Hongbo Yang, Chihong Zhang, José Nelson Amaral, Guang R. Gao: Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs. IPDPS 2001: 26
25	EE	Ramaswamy Govindarajan, Anand Sivasubramaniam: Guest Editors' Introduction: Special Issue on Cluster and Network-Based Computing. J. Parallel Distrib. Comput. 61(11): 1507-1511 (2001)
2000
24	EE	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao: A Theory for Software-Hardware Co-Scheduling for ASIPs and Embedded Processors. ASAP 2000: 329-338
23		Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Erik R. Altman, Guang R. Gao: Enhanced Co-Scheduling: A Software Pipelining Method Using Modulo-Scheduled Pipeline Theory. International Journal of Parallel Programming 28(1): 1-46 (2000)
1999
22		Chihong Zhang, Ramaswamy Govindarajan, Sean Ryan, Guang R. Gao: Efficient State-Diagram Construction Methods for Software Pipelining. CC 1999: 153-167
21		V. Janaki Ramanan, Ramaswamy Govindarajan: Resource Usage Modelling for Software Pipelining. HiPC 1999: 111-119
20	EE	V. Janaki Ramanan, Ramaswamy Govindarajan: Resource usage models for instruction scheduling: two new models and a classification. International Conference on Supercomputing 1999: 417-424
19	EE	Ramaswamy Govindarajan, Chihong Zhang, Guang R. Gao: Minimum Register Instruction Scheduling: A New Approach for Dynamic Instruction Issue Processors. LCPC 1999: 70-84
1998
18	EE	Ramaswamy Govindarajan, N. S. S. Narasimha Rao, Erik R. Altman, Guang R. Gao: An Enhanced Co-Scheduling Method Using Reduced MS-State Diagrams. IPPS/SPDP 1998: 168-175
17	EE	Amod K. Dani, V. Janaki Ramanan, Ramaswamy Govindarajan: Register-Sensitive Software Pipelining. IPPS/SPDP 1998: 194-198
16		Erik R. Altman, Ramaswamy Govindarajan, Guang R. Gao: A Unified Framework for Instruction Scheduling and Mapping for Function Units with Structural Hazards. J. Parallel Distrib. Comput. 49(2): 259-293 (1998)
1997
15	EE	Rad Silvera, Jian Wang, Ramaswamy Govindarajan, Guang R. Gao: A Register Pressure Sensitive Instruction Scheduler for Dynamic Issue Processors. IEEE PACT 1997: 78-89
1996
14	EE	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao: Co-Scheduling Hardware and Software Pipelines. HPCA 1996: 52-61
13	EE	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao: A Framework for Resource-Constrained Rate-Optimal Software Pipelining. IEEE Trans. Parallel Distrib. Syst. 7(11): 1133-1149 (1996)
1995
12		Ramaswamy Govindarajan, Shashank S. Nemawarkar, Phillip LeNir: Design and Performance Evaluation of a Multithreaded Architecture. HPCA 1995: 298-307
11		Erik R. Altman, Guang R. Gao, Ramaswamy Govindarajan: An Experimental Study of an ILP-based Exact Solution Method for Software Pipelining. LCPC 1995: 16-30
10		Erik R. Altman, Ramaswamy Govindarajan, Guang R. Gao: Scheduling and Mapping: Software Pipelining in the Presence of Structural Hazards. PLDI 1995: 139-150
9	EE	Ramaswamy Govindarajan, Guang R. Gao: Rate-optimal schedule for multi-rate DSP computations. VLSI Signal Processing 9(3): 211-232 (1995)
1994
8		Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao: A Framework for Resource-Constrained Rate-Optimal Software Pipelining. CONPAR 1994: 640-651
7	EE	Ramaswamy Govindarajan, Erik R. Altman, Guang R. Gao: Minimizing register requirements under resource-constrained rate-optimal software pipelining. MICRO 1994: 85-94
6		Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal: Performance of Interconnection Network in Multithreaded Architectures. PARLE 1994: 823-826
1993
5		Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal: Analysis of Multithreaded Multiprocessors with Distributed Shared Memory. SPDP 1993: 114-121
1992
4		Ramaswamy Govindarajan, Shashank S. Nemawarkar: A Large Context Multithreaded Architecture. CONPAR 1992: 423-428
3		Shashank S. Nemawarkar, Ramaswamy Govindarajan, Guang R. Gao, Vinod K. Agarwal: Performance Evaluation of Latency Tolerant Architectures. ICCI 1992: 183-186
2	EE	Philip LeNir, Ramaswamy Govindarajan, Shashank S. Nemawarkar: Exploiting instruction-level parallelism: the multithreaded approach. MICRO 1992: 189-192
1		Ramaswamy Govindarajan, Shashank S. Nemawarkar: SMALL: A Scalable Multithreaded Architecture to Exploit Large Localiy. SPDP 1992: 32-39

Coauthor Index

1	Vinod K. Agarwal	[3] [5] [6]
2	Erik R. Altman	[7] [8] [10] [11] [13] [14] [16] [18] [23] [24]
3	José Nelson Amaral (José N. Amaral)	[26] [30]
4	Juan del Cuvillo	[33]
5	Amod K. Dani	[17]
6	Palash Desai	[27]
7	Alban Douillet	[34] [35] [37]
8	Guang R. Gao	[3] [5] [6] [7] [8] [9] [10] [11] [13] [14] [15] [16] [18] [19] [22] [23] [24] [26] [27] [29] [30] [31] [32] [33] [34] [35] [36] [37]
9	Ziang Hu	[31] [33] [36]
10	Adeline Jacquet	[32] [33]
11	Vincent Janot	[32] [33]
12	Philip LeNir	[2]
13	Phillip LeNir	[12]
14	Clement Leung	[32] [33]
15	Jizhu Lu	[33]
16	Shashank S. Nemawarkar	[1] [2] [3] [4] [5] [6] [12]
17	V. Janaki Ramanan	[17] [20] [21]
18	N. S. S. Narasimha Rao	[18] [23]
19	Hongbo Rong	[34] [35] [37]
20	Sean Ryan	[22]
21	Rad Silvera	[15]
22	Anand Sivasubramaniam	[25]
23	Thomas L. Sterling	[32] [33]
24	Zhizhong Tang	[35] [37]
25	Kevin B. Theobald	[29] [33]
26	Jian Wang	[15]
27	Haiping Wu	[33]
28	Hongbo Yang	[26] [29] [30] [31] [36]
29	Chihong Zhang	[19] [22] [26] [30]

Colors in the list of coauthors