| 1999 |
|---|
| 6 | | Graham Hetherington,
Tony Fryars,
Nagesh Tamarapalli,
Mark Kassab,
Abu S. M. Hassan,
Janusz Rajski:
Logic BIST for large industrial designs: real issues and case studies.
ITC 1999: 358-367 |
| 1994 |
|---|
| 5 | EE | Benoit Nadeau-Dostie,
Dwayne Burek,
Abu S. M. Hassan:
ScanBist: A Multifrequency Scan-Based BIST Method.
IEEE Design & Test of Computers 11(1): 7-17 (1994) |
| 1992 |
|---|
| 4 | | Benoit Nadeau-Dostie,
Dwayne Burek,
Abu S. M. Hassan:
ScanBIST: A Multi-frequency Scan-based BIST Method.
ITC 1992: 506-513 |
| 3 | EE | Abu S. M. Hassan,
Vinod K. Agarwal,
Benoit Nadeau-Dostie,
Janusz Rajski:
BIST of PCB interconnects using boundary-scan architecture.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(10): 1278-1288 (1992) |
| 1989 |
|---|
| 2 | | Abu S. M. Hassan,
Vinod K. Agarwal,
Janusz Rajski,
Benoit Nadeau-Dostie:
Testing of Glue Logic Interconnects Using Boundary Scan Architecture.
ITC 1989: 700-711 |
| 1988 |
|---|
| 1 | | Abu S. M. Hassan,
Vinod K. Agarwal,
Janusz Rajski:
Testing and Diagnosis of Interconnects Using Boundary Scan Architecture.
ITC 1988: 126-137 |
