IEEE Design & Test of Computers, Volume 7

Volume 7, Number 1, January-February 1990

• D&T News. 2, 5 BibTeX

• Editorial Calendar. 4- BibTeX

• Ben Bennetts: Test Technology in Europe. 6-8 BibTeX
• R. P. van Riessen, Hans G. Kerkhoff, A. Kloppenburg:
  Designing and Implementing an Architecture with Boundary Scan. 9-19
  Electronic Edition (link) BibTeX
• Hugu K. Seitz, Armin Blacha, Rolf Clauberg, H. Beha, J. Feder:
  Contactless High-Speed Waveform Measurements on Gallium. 20-25
  Electronic Edition (link) BibTeX
• Phil Nigh, Wojciech Maly:
  Test Generation for Current Testing (CMOS ICs). 26-38
  Electronic Edition (link) BibTeX
• Bas Verhelst:
  Using a Test-Specification Format in Automatic Test-Program Generation. 39-45
  Electronic Edition (link) BibTeX
• The Challenges of Self-Test. 46-54 BibTeX
• A D&T Roundtable: Behavioral Description Languages, Part 1: Are Designers Benefitting? 56-62 BibTeX
• The 1989 Annual Index. 63-67 BibTeX

• DATC Newsletter. 70-71 BibTeX

Volume 7, Number 2, March-April 1990

• M. Ray Mercer: Guest Editorial: ITC 20th Anniversary. 2-3 BibTeX
• Christopher W. Branson:
  Integrating Tester Pin Electronics. 4-14
  Electronic Edition (link) BibTeX
• Robert W. Bassett, Barry J. Butkus, Stephen L. Dingle, Marc R. Faucher, Pamela S. Gillis, Jeannie H. Panner, John G. Petrovick, Donald L. Wheater:
  Low-Cost Testing of High-Density Logic Components. 15-28
  Electronic Edition (link) BibTeX
• Richard Illman, Stephen Clarke:
  Built-In Self-Test of the Macrolan Chip. 29-40
  Electronic Edition (link) BibTeX
• Frans P. M. Beenker, Barry J. Dekker, Richard Stans, Max Van der Star:
  Implementing Macro Test in Silicon Compiler Design. 41-51
  Electronic Edition (link) BibTeX
• Benoit Nadeau-Dostie, Allan Silburt, Vinod K. Agarwal:
  Serial Interfacing for Embedded-Memory Testing. 52-63
  Electronic Edition (link) BibTeX
• A D&T Roundtable: Behavioral Description Languages, Part 2: VHDL vs. UDL/I. 64-68 BibTeX

• TTTC Newsletter. 70-71 BibTeX

Volume 7, Number 3, May-June 1990

• D&T News. 2, 4, 6-7, 64 BibTeX

• James R. Armstrong: Tuning VHDL for Multivalve Logic Modeling. 8-10 BibTeX
• Paul J. Menchini:
  A Minimalist Approach to VHDL Logic Modeling. 12-23
  Electronic Edition (link) BibTeX
• David R. Coelho:
  A VHDL Standard Package for Logic Modeling. 25-32
  Electronic Edition (link) BibTeX
• Steven P. Smith, Ramón D. Acosta:
  A Value System for Switch-Level Modeling. 33-41
  Electronic Edition (link) BibTeX
• Joanne DeGroat:
  Transparent Logic Modeling in VHDL. 42-48
  Electronic Edition (link) BibTeX
• Alfred S. Gilman:
  Logic Modeling in WAVES. 49-55
  Electronic Edition (link) BibTeX
• A D&T Roundtable: Does VLSI Education Meet Industry's Needs?. 56-63 BibTeX

• DATC Newsletter. 70-71 BibTeX

Volume 7, Number 4, July-August 1990

• D&T News. 2-3, 76 BibTeX

• Kenneth D. Wagner: Guest Editorial: The Many Faces of Test. 4- BibTeX
• Sandip Kundu, Sudhakar M. Reddy:
  Embedded Totally Self-Checking Checkers: A Practical Design. 5-12
  Electronic Edition (link) BibTeX
• David A. Wood, Garth A. Gibson, Randy H. Katz:
  Verifying a Multiprocessor Cache Controller Using Random Test Generation. 13-25
  Electronic Edition (link) BibTeX
• Kewal K. Saluja, Kyuchull Kim:
  Improved Test Generation for High-Activity Circuits. 26-31
  Electronic Edition (link) BibTeX
• Vishwani D. Agrawal, Hatsuyoshi Kato:
  Fault Sampling Revisited. 32-35
  Electronic Edition (link) BibTeX
• A. Ahmad, N. K. Nanda, K. Garg:
  Are Primitive Polynomials Always Best in Signature Analysis? 36-38
  Electronic Edition (link) BibTeX
• Sakti P. Ghosh, Edward G. Grochowski:
  Dynamic Statistical Control of Manufacturing Test. 39-51
  Electronic Edition (link) BibTeX
• Jer Min Jou, Jau-Yien Lee, Yachyang Sun, Jhing-Fa Wang:
  An Efficient VLSI Switch-Box Router. 52-65
  Electronic Edition (link) BibTeX
• A D&T Roundtable: System Test-What, Why, and How? 66-72 BibTeX

• TTTC Newsletter. 78-79 BibTeX

Volume 7, Number 5, September-October 1990

• D&T News. 3-4 BibTeX

• Giovanni De Micheli: Guest Editorial: High-Level Synthesis of Digital Circuits. 6-7 BibTeX
• Raul Camposano:
  From Behavior to Structure: High-Level Synthesis. 8-19
  Electronic Edition (link) BibTeX
• Jayaram Bhasker, Huan-Chih Lee:
  An Optimizer for Hardware Synthesis. 20-36
  Electronic Edition (link) BibTeX
• Giovanni De Micheli, David C. Ku, Frederic Mailhot, Thomas K. Truong:
  The Olympus Synthesis System. 37-53
  Electronic Edition (link) BibTeX
• Srimat T. Chakradhar, Vishwani D. Agrawal, Michael L. Bushnell, Thomas K. Truong:
  Neural Net and Boolean Satisfiability Models of Logic Circuits. 54-57
  Electronic Edition (link) BibTeX

• DATC Newsletter. 62-63 BibTeX

Volume 7, Number 6, November-December 1990

• D&T News. 5-7, 41 BibTeX , 41

• What's Ahead for 1991? 2-3 BibTeX
• Nikil D. Dutt, Daniel D. Gajski:
  Design Synthesis and Silicon Compilation. 8-23
  Electronic Edition (link) BibTeX
• Jung-Gen Wu, Yu Hen Hu, William P.-C. Ho, David Y. Y. Yun:
  A Model-Based Expert System for Digital System Design. 24-40
  Electronic Edition (link) BibTeX
• Peter M. Maurer:
  Dynamic Functional Testing for VLSI Circuits. 42-49
  Electronic Edition (link) BibTeX
• A D&T Roundtable: Synthesis for Testability. 50-59 BibTeX
• 1990 Annual Index. 60-65 BibTeX

• TTTC Newsletter. 70-71 BibTeX