1995 | ||
---|---|---|
6 | EE | Henry Cox: Synthesizing Circuits with Implicit Testability Constraints. IEEE Design & Test of Computers 12(2): 16-23 (1995) |
1994 | ||
5 | Henry Cox: On Synthesizing Circuits With Implicit Testability Constraints. ITC 1994: 989-998 | |
4 | EE | Henry Cox, Janusz Rajski: On necessary and nonconflicting assignments in algorithmic test pattern generation. IEEE Trans. on CAD of Integrated Circuits and Systems 13(4): 515-530 (1994) |
1988 | ||
3 | Henry Cox, André Ivanov, Vinod K. Agarwal, Janusz Rajski: On Multiple Fault Coverage and Aliasing Probability Measures. ITC 1988: 314-321 | |
2 | Henry Cox, Janusz Rajski: Stuck-Open and Transition Fault Testing in CMOS Complex Gates. ITC 1988: 688-694 | |
1 | EE | Henry Cox, Janusz Rajski: A method of fault analysis for test generation and fault diagnosis. IEEE Trans. on CAD of Integrated Circuits and Systems 7(7): 813-833 (1988) |
1 | Vinod K. Agarwal | [3] |
2 | André Ivanov | [3] |
3 | Janusz Rajski | [1] [2] [3] [4] |