| 2005 |
| 18 | EE | Puneet Gupta,
Andrew B. Kahng,
Stefanus Mantik:
Routing-aware scan chain ordering.
ACM Trans. Design Autom. Electr. Syst. 10(3): 546-560 (2005) |
| 2004 |
| 17 | EE | Andrew E. Caldwell,
Hyun-Jin Choi,
Andrew B. Kahng,
Stefanus Mantik,
Miodrag Potkonjak,
Gang Qu,
Jennifer L. Wong:
Effective iterative techniques for fingerprinting design IP.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 208-215 (2004) |
| 2003 |
| 16 | EE | Puneet Gupta,
Andrew B. Kahng,
Stefanus Mantik:
A Proposal for Routing-Based Timing-Driven Scan Chain Ordering.
ISQED 2003: 339-343 |
| 2002 |
| 15 | EE | Andrew B. Kahng,
Stefanus Mantik,
Igor L. Markov:
Min-max placement for large-scale timing optimization.
ISPD 2002: 143-148 |
| 14 | EE | Andrew B. Kahng,
Stefanus Mantik:
Measurement of Inherent Noise in EDA Tools.
ISQED 2002: 206-212 |
| 2001 |
| 13 | EE | Andrew B. Kahng,
Stefanus Mantik:
A System for Automatic Recording and Prediction of Design Quality Metrics.
ISQED 2001: 81-86 |
| 12 | EE | Kenneth D. Boese,
Andrew B. Kahng,
Stefanus Mantik:
On the relevance of wire load models.
SLIP 2001: 91-98 |
| 11 | EE | Andrew B. Kahng,
John Lach,
William H. Mangione-Smith,
Stefanus Mantik,
Igor L. Markov,
Miodrag Potkonjak,
Paul Tucker,
Huijuan Wang,
Gregory Wolfe:
Constraint-based watermarking techniques for design IP protection.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001) |
| 10 | EE | Andrew B. Kahng,
Stefanus Mantik,
Dirk Stroobandt:
Toward accurate models of achievable routing.
IEEE Trans. on CAD of Integrated Circuits and Systems 20(5): 648-659 (2001) |
| 2000 |
| 9 | EE | Stephen Fenstermaker,
David George,
Andrew B. Kahng,
Stefanus Mantik,
Bart Thielges:
METRICS: a system architecture for design process optimization.
DAC 2000: 705-710 |
| 8 | | Andrew B. Kahng,
Stefanus Mantik:
On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools.
ICCAD 2000: 17-21 |
| 7 | EE | Andrew B. Kahng,
Stefanus Mantik,
Dirk Stroobandt:
Requirements for models of achievable routing.
ISPD 2000: 4-11 |
| 1999 |
| 6 | EE | Andrew E. Caldwell,
Hyun-Jin Choi,
Andrew B. Kahng,
Stefanus Mantik,
Miodrag Potkonjak,
Gang Qu,
Jennifer L. Wong:
Effective Iterative Techniques for Fingerprinting Design IP.
DAC 1999: 843-848 |
| 5 | EE | Andrew B. Kahng,
Darko Kirovski,
Stefanus Mantik,
Miodrag Potkonjak,
Jennifer L. Wong:
Copy detection for intellectual property protection of VLSI designs.
ICCAD 1999: 600-605 |
| 4 | EE | Andrew E. Caldwell,
Andrew B. Kahng,
Stefanus Mantik,
Igor L. Markov,
Alexander Zelikovsky:
On wirelength estimations for row-based placement.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1265-1278 (1999) |
| 1998 |
| 3 | EE | Andrew B. Kahng,
John Lach,
William H. Mangione-Smith,
Stefanus Mantik,
Igor L. Markov,
Miodrag Potkonjak,
Paul Tucker,
Huijuan Wang,
Gregory Wolfe:
Watermarking Techniques for Intellectual Property Protection.
DAC 1998: 776-781 |
| 2 | EE | Andrew B. Kahng,
Stefanus Mantik,
Igor L. Markov,
Miodrag Potkonjak,
Paul Tucker,
Huijuan Wang,
Gregory Wolfe:
Robust IP Watermarking Methodologies for Physical Design.
DAC 1998: 782-787 |
| 1 | EE | Andrew E. Caldwell,
Andrew B. Kahng,
Stefanus Mantik,
Igor L. Markov,
Alexander Zelikovsky:
On wirelength estimations for row-based placement.
ISPD 1998: 4-11 |