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Stefanus Mantik

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2005
18EEPuneet Gupta, Andrew B. Kahng, Stefanus Mantik: Routing-aware scan chain ordering. ACM Trans. Design Autom. Electr. Syst. 10(3): 546-560 (2005)
2004
17EEAndrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong: Effective iterative techniques for fingerprinting design IP. IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 208-215 (2004)
2003
16EEPuneet Gupta, Andrew B. Kahng, Stefanus Mantik: A Proposal for Routing-Based Timing-Driven Scan Chain Ordering. ISQED 2003: 339-343
2002
15EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov: Min-max placement for large-scale timing optimization. ISPD 2002: 143-148
14EEAndrew B. Kahng, Stefanus Mantik: Measurement of Inherent Noise in EDA Tools. ISQED 2002: 206-212
2001
13EEAndrew B. Kahng, Stefanus Mantik: A System for Automatic Recording and Prediction of Design Quality Metrics. ISQED 2001: 81-86
12EEKenneth D. Boese, Andrew B. Kahng, Stefanus Mantik: On the relevance of wire load models. SLIP 2001: 91-98
11EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Constraint-based watermarking techniques for design IP protection. IEEE Trans. on CAD of Integrated Circuits and Systems 20(10): 1236-1252 (2001)
10EEAndrew B. Kahng, Stefanus Mantik, Dirk Stroobandt: Toward accurate models of achievable routing. IEEE Trans. on CAD of Integrated Circuits and Systems 20(5): 648-659 (2001)
2000
9EEStephen Fenstermaker, David George, Andrew B. Kahng, Stefanus Mantik, Bart Thielges: METRICS: a system architecture for design process optimization. DAC 2000: 705-710
8 Andrew B. Kahng, Stefanus Mantik: On Mismatches between Incremental Optimizers and Instance Perturbations in Physical Design Tools. ICCAD 2000: 17-21
7EEAndrew B. Kahng, Stefanus Mantik, Dirk Stroobandt: Requirements for models of achievable routing. ISPD 2000: 4-11
1999
6EEAndrew E. Caldwell, Hyun-Jin Choi, Andrew B. Kahng, Stefanus Mantik, Miodrag Potkonjak, Gang Qu, Jennifer L. Wong: Effective Iterative Techniques for Fingerprinting Design IP. DAC 1999: 843-848
5EEAndrew B. Kahng, Darko Kirovski, Stefanus Mantik, Miodrag Potkonjak, Jennifer L. Wong: Copy detection for intellectual property protection of VLSI designs. ICCAD 1999: 600-605
4EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1265-1278 (1999)
1998
3EEAndrew B. Kahng, John Lach, William H. Mangione-Smith, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Watermarking Techniques for Intellectual Property Protection. DAC 1998: 776-781
2EEAndrew B. Kahng, Stefanus Mantik, Igor L. Markov, Miodrag Potkonjak, Paul Tucker, Huijuan Wang, Gregory Wolfe: Robust IP Watermarking Methodologies for Physical Design. DAC 1998: 782-787
1EEAndrew E. Caldwell, Andrew B. Kahng, Stefanus Mantik, Igor L. Markov, Alexander Zelikovsky: On wirelength estimations for row-based placement. ISPD 1998: 4-11

Coauthor Index

1Kenneth D. Boese [12]
2Andrew E. Caldwell [1] [4] [6] [17]
3Hyun-Jin Choi [6] [17]
4Stephen Fenstermaker [9]
5David George [9]
6Puneet Gupta [16] [18]
7Andrew B. Kahng [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
8Darko Kirovski [5]
9John Lach [3] [11]
10William H. Mangione-Smith [3] [11]
11Igor L. Markov [1] [2] [3] [4] [11] [15]
12Miodrag Potkonjak [2] [3] [5] [6] [11] [17]
13Gang Qu [6] [17]
14Dirk Stroobandt [7] [10]
15Bart Thielges [9]
16Paul Tucker [2] [3] [11]
17Huijuan Wang [2] [3] [11]
18Gregory Wolfe [2] [3] [11]
19Jennifer L. Wong [5] [6] [17]
20Alexander Zelikovsky [1] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)