| 1999 |
|---|
| 6 | EE | Ayoob E. Dooply,
Kenneth Y. Yun:
Optimal Clocking and Enhanced Testability for High-Performance Self-Resetting Domino Pipelines.
ARVLSI 1999: 200-214 |
| 5 | EE | Kenneth Y. Yun,
Ayoob E. Dooply:
Optimal Evaluation Clocking of Self-Resetting Domino Pipelines.
ASP-DAC 1999: 121-124 |
| 4 | EE | Kenneth Y. Yun,
Ayoob E. Dooply:
Pausible clocking-based heterogeneous systems.
IEEE Trans. VLSI Syst. 7(4): 482-488 (1999) |
| 1998 |
|---|
| 3 | EE | Kenneth Y. Yun,
Peter A. Beerel,
Vida Vakilotojar,
Ayoob E. Dooply,
Julio Arceo:
The design and verification of a high-performance low-control-overhead asynchronous differential equation solver.
IEEE Trans. VLSI Syst. 6(4): 643-655 (1998) |
| 1997 |
|---|
| 2 | EE | Kenneth Y. Yun,
Ayoob E. Dooply,
Julio Arceo,
Peter A. Beerel,
Vida Vakilotojar:
The Design and Verification of A High-Performance Low-Control-Overhead Asynchronous Differential Equation Solver.
ASYNC 1997: 140- |
| 1 | EE | Steven M. Nowick,
Kenneth Y. Yun,
Ayoob E. Dooply,
Peter A. Beerel:
Speculative Completion for the Design of High-Performance Asynchronous Dynamic Adders.
ASYNC 1997: 210- |
