2007 |
14 | EE | Robert C. Chang,
Hsin-Lei Lin,
I-Hao Wang:
Low-Power Eight-Bit Scsdl CLA with a Novel Split-Level charge-Sharing Differential Logic (Scsdl).
Journal of Circuits, Systems, and Computers 16(3): 389-402 (2007) |
2006 |
13 | EE | Kuang-Hao Lin,
Hsin-Lei Lin,
Robert C. Chang,
Ching-Fen Wu:
Hardware Architecture of Improved Tomlinson-Harashima Precoding for Downlink MC-CDMA.
APCCAS 2006: 1200-1203 |
12 | EE | Hou-Ming Chen,
Ding-Da Jiang,
Robert C. Chang:
A Monolithic Boost Converter with an Adaptable Current-Limited PFM Scheme.
APCCAS 2006: 662-665 |
11 | EE | Hou-Ming Chen,
Chih-Liang Huang,
Robert C. Chang:
A new temperature-compensated CMOS bandgap reference circuit for portable applications.
ISCAS 2006 |
10 | EE | Kuang-Hao Lin,
Hsin-Lei Lin,
Shih-Ming Wang,
Robert C. Chang:
Implementation of digital IQ imbalance compensation in OFDM WLAN receivers.
ISCAS 2006 |
9 | EE | Robert C. Chang,
Po-Chung Hung,
Hsin-Lei Lin:
Low Power Energy Recovery Complementary Pass-Transistor Logic.
Journal of Circuits, Systems, and Computers 15(4): 491-504 (2006) |
2005 |
8 | EE | Robert C. Chang,
Lung-Chih Kuo,
Hou-Ming Chen:
A Low-voltage Low-power Cmos Phase-locked Loop.
Journal of Circuits, Systems, and Computers 14(5): 997-1006 (2005) |
2004 |
7 | | Yu-Yin Sung,
Robert C. Chang:
A novel CMOS double-edge triggered flip-flop for low-power applications.
ISCAS (2) 2004: 665-668 |
6 | | Chin-Sheng Chen,
Robert C. Chang:
A new prescaler for fully integrated 5-GHz CMOS frequency synthesizer.
ISCAS (4) 2004: 245-248 |
2003 |
5 | EE | Hsin-Lei Lin,
Robert C. Chang,
Chih-Hao Huang,
Hongchin Lin:
A flexible design of a decision feedback equalizer and a novel CCK technique for wireless LAN systems.
ISCAS (2) 2003: 153-156 |
2002 |
4 | EE | Robert C. Chang,
L.-C. Hsu,
M.-C. Sun:
A Low-Power and High-Speed D Flip-Flop Using a Single Latch.
Journal of Circuits, Systems, and Computers 11(1): 51-56 (2002) |
1999 |
3 | EE | Robert C. Chang,
Lung-Chih Kuo,
Chih-Yuan Hsieh:
VLSI implementation of a multicast ATM switch.
ISCAS (1) 1999: 129-132 |
1995 |
2 | EE | Eric Y. Chou,
Bing J. Sheu,
Tony H. Wu,
Robert C. Chang:
VLSI design of densely-connected array processors.
ICCD 1995: 492-497 |
1 | | Bing J. Sheu,
Robert C. Chang,
Tony H. Wu,
Sa Hyun Bang:
VLSI-Compatible Cellular Neural Networks with Optimal Solution Capability for Optimization.
ISCAS 1995: 1165-1168 |