| 2009 |
|---|
| 4 | EE | Sohan Purohit,
Sai Rahul Chalamalasetti,
Martin Margala:
A 1.2v, 1.02 ghz 8 bit SIMD compatible highly parallel arithmetic data path for multi-precision arithmetic.
ACM Great Lakes Symposium on VLSI 2009: 433-436 |
| 3 | EE | Sohan Purohit,
Martin Margala,
Marco Lanuzza,
Pasquale Corsonello:
New performance/power/area efficient, reliable full adder design.
ACM Great Lakes Symposium on VLSI 2009: 493-498 |
| 2 | EE | Sohan Purohit,
Marco Lanuzza,
Stefania Perri,
Pasquale Corsonello,
Martin Margala:
Design-Space Exploration of Energy-Delay-Area Efficient Coarse-Grain Reconfigurable Datapath.
VLSI Design 2009: 45-50 |
| 2008 |
|---|
| 1 | EE | Sohan Purohit,
Sai Rahul Chalamalasetti,
Martin Margala,
Pasquale Corsonello:
Power/throughput/area efficient PIM-based reconfigurable array for parallel processing.
SoCC 2008: 375-378 |
