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2008 | ||
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2 | EE | Siva Kumar Sastry Hari, Vishnu Vardhan Reddy Konda, V. Kamakoti, Vivekananda M. Vedula, K. S. Maneperambil: Automatic Constraint Based Test Generation for Behavioral HDL Models. IEEE Trans. VLSI Syst. 16(4): 408-421 (2008) |
2007 | ||
1 | EE | K. Najeeb, Vishnu Vardhan Reddy Konda, Siva Kumar Sastry Hari, V. Kamakoti, Vivekananda M. Vedula: Power Virus Generation Using Behavioral Models of Circuits. VTS 2007: 35-42 |
1 | Siva Kumar Sastry Hari | [1] [2] |
2 | V. Kamakoti | [1] [2] |
3 | K. S. Maneperambil | [2] |
4 | K. Najeeb | [1] |
5 | Vivekananda M. Vedula | [1] [2] |