2005 |
5 | EE | Saurabh Goyal,
Mihir R. Choudhury,
S. S. S. P. Rao,
L. Kalyan Kumar:
Multiple Fault Testing of Logic Resources of SRAM-Based FPGAs.
VLSI Design 2005: 742-747 |
4 | EE | L. Kalyan Kumar,
Aditya S. Ramani,
Amol J. Mupid,
V. Kamakoti:
Pseudo-online testing methodologies for various components of field programmable gate arrays.
Microprocessors and Microsystems 29(2-3): 99-119 (2005) |
2003 |
3 | EE | L. Kalyan Kumar,
Amol J. Mupid,
Aditya S. Ramani,
V. Kamakoti:
A Novel Method for Online In-Place Detection and Location of Multiple Interconnect Faults in SRAM Based FPGAs.
Asian Test Symposium 2003: 262-267 |
2 | EE | L. Kalyan Kumar,
Amol J. Mupid,
Aditya S. Ramani,
V. Kamakoti:
Testable Clock Routing Architecture for Field Programmable Gate Arrays.
FPL 2003: 1044-1047 |
1 | | L. Kalyan Kumar,
Aditya S. Ramani,
Amol J. Mupid,
V. Kamakoti,
Sivaprakasam Suresh:
On-Line Location of Multiple Faults in LUT Based Reconfigurable Systems.
VLSI 2003: 224-232 |