2006 |
10 | | Fumiyasu Hirose:
Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 2006
IEEE 2006 |
1999 |
9 | | Rajeev Murgai,
Fumiyasu Hirose,
Masahiro Fujita:
Speeding Up Look-up-Table Driven Logic Simulation.
VLSI 1999: 385-397 |
1997 |
8 | EE | Minoru Shoji,
Fumiyasu Hirose,
Shintaro Shimogori,
Satoshi Kowatari,
Hiroshi Nagai:
Acceleration of behavioral simulation on simulation specific machines.
ED&TC 1997: 373-377 |
1996 |
7 | EE | Hiroaki Iwashita,
Tsuneo Nakata,
Fumiyasu Hirose:
CTL model checking based on forward state traversal.
ICCAD 1996: 82-87 |
1995 |
6 | EE | Vishwani D. Agrawal,
Bernard Courtois,
Fumiyasu Hirose,
Sandip Kundu,
Chung-Len Lee,
Yinghua Min,
P. Pal Chaudhuri:
Panel: New Research Problems in the Emerging Test Technology.
Asian Test Symposium 1995: 189- |
5 | EE | Rajeev Murgai,
Masahiro Fujita,
Fumiyasu Hirose:
Logic synthesis for a single large look-up table.
ICCD 1995: 415- |
1994 |
4 | EE | Hiroaki Iwashita,
Satoshi Kowatari,
Tsuneo Nakata,
Fumiyasu Hirose:
Automatic test program generation for pipelined processors.
ICCAD 1994: 580-583 |
1992 |
3 | EE | Fumiyasu Hirose:
Performance Evaluation of an Event-Driven Logic Simulation Machine.
DAC 1992: 428-431 |
1988 |
2 | EE | Minoru Saitoh,
Kenji Iwata,
Akiko Nokamura,
Makoto Kakegawa,
Junichi Masuda,
Hirofumi Hamamura,
Fumiyasu Hirose,
Nobuaki Kawato:
Logic Simulation System Using Simulation Processor (SP).
DAC 1988: 225-230 |
1 | | Fumiyasu Hirose,
Koichiro Takayama,
Nobuaki Kawato:
A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator.
ITC 1988: 102-107 |