2008 |
19 | EE | Jianjiang Ceng,
Jerónimo Castrillón,
Weihua Sheng,
Hanno Scharwächter,
Rainer Leupers,
Gerd Ascheid,
Heinrich Meyr,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
MAPS: an integrated framework for MPSoC application parallelization.
DAC 2008: 754-759 |
18 | EE | Mohammad Zalfany Urfianto,
Tsuyoshi Isshiki,
Arif Ullah Khan,
Dongju Li,
Hiroaki Kunieda:
A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development.
IEICE Transactions 91-A(4): 1185-1196 (2008) |
17 | EE | Sumek Wisayataksin,
Dongju Li,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
Low Cost SoC Design of H.264/AVC Decoder for Handheld Video Player.
IEICE Transactions 91-A(4): 1197-1205 (2008) |
16 | EE | Mohammad Zalfany Urfianto,
Tsuyoshi Isshiki,
Arif Ullah Khan,
Dongju Li,
Hiroaki Kunieda:
Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC.
IEICE Transactions 91-A(7): 1748-1756 (2008) |
2005 |
15 | EE | Jinqing Qi,
Desiree Abdurrachim,
Dongju Li,
Hiroaki Kunieda:
A Hybrid Method for Fingerprint Image Quality Calculation.
AutoID 2005: 124-129 |
14 | EE | Trio Adiono,
Dani Fitriyanto,
Akhmad Mulyanto,
Sumek Wisayataksin,
Kazumasa Takeichi,
Dongju Li,
Tati Rajab Mengko,
Hiroaki Kunieda:
New Macroblock Engine Architecture for Video Processing.
MVA 2005: 68-71 |
13 | EE | Andy Surya Rikin,
Dongju Li,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
A Fingerprint Matching Using Minutia Ridge Shape for Low Cost Match-on-Card Systems.
IEICE Transactions 88-A(5): 1305-1312 (2005) |
2002 |
12 | EE | Tsuyoshi Isshiki,
Akihisa Ohta,
T. Watanabe,
T. Nakada,
K. Akahane,
I. Sisla,
Dongju Li,
Hiroaki Kunieda:
High density bit-serial FPGA with LUT embedding shift register function.
APCCAS (1) 2002: 475-480 |
11 | EE | Andy Surya Rikin,
W. Yiwen,
T. Nakada,
L. Dongju,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
Realization of fingerprint identification module on DSP board.
APCCAS (1) 2002: 509-512 |
10 | EE | I. Adiono,
Tsuyoshi Isshiki,
Dongju Li,
Hiroaki Kunieda:
Efficient method for face region quality enhancement in low bit rate video coding.
APCCAS (1) 2002: 549-553 |
9 | EE | R. Adiono,
Tsuyoshi Isshiki,
Dongju Li,
Hiroaki Kunieda:
A new methodology for low delay real-time videophone software architecture design.
APCCAS (2) 2002: 269-273 |
2001 |
8 | | Tsuyoshi Isshiki,
Chawalit Honsawek,
Trio Adiono,
Kazuhito Ito,
Tomohiko Ohtsuka,
Dongju Li,
Hiroaki Kunieda:
H.263+ Video Encoder/Decoder LSI Featuring System-MSPA Architecture and Improved Rate Control Method.
ISAS-SCI (1) 2001: 195-200 |
2000 |
7 | EE | Tsuyoshi Isshiki,
Makoto Ishikawa,
Hiroaki Kunieda:
Cost-effective shadowing method using the ED-buffer on an adaptive light cube.
The Visual Computer 16(7): 453-468 (2000) |
1999 |
6 | EE | Li Jiang,
Dongju Li,
Shintaro Haba,
Chawalit Honsawek,
Hiroaki Kunieda:
Motion Estimator LSI for MPEG2 High Level Standard.
ASP-DAC 1999: 41-44 |
5 | EE | Tsuyoshi Isshiki,
Hiroaki Kunieda:
Efficient anti-aliasing algorithm for computer generated images.
ISCAS (4) 1999: 532-535 |
1998 |
4 | | Tsuyoshi Isshiki,
Takenobu Shimizugashira,
Akihisa Ohta,
Imanuddin Amril,
Hiroaki Kunieda:
FPGA for High-Performance Bit-Serial Pipeline Datapath.
ASP-DAC 1998: 331-332 |
3 | EE | Akihisa Ohta,
Tsuyoshi Isshiki,
Hiroaki Kunieda:
New FPGA Architecture for Bit-Serial Pipeline Datapath.
FCCM 1998: 58-67 |
2 | EE | Tsuyoshi Isshiki,
Takenobu Shimizugashira,
Akihisa Ohta,
Imanuddin Amril,
Hiroaki Kunieda:
A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract).
FPGA 1998: 255 |
1995 |
1 | EE | Hiroaki Kunieda,
Yusong Liao,
Dongju Li,
Kazuhito Ito:
Automatic design for bit-serial MSPA architecture.
ASP-DAC 1995 |