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T. Briscoe

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2005
1EER. Castagnetti, R. Venkatraman, B. Bartz, C. Monzel, T. Briscoe, Andres Teene, S. Ramesh: A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoC. ISQED 2005: 193-196

Coauthor Index

1B. Bartz [1]
2R. Castagnetti [1]
3C. Monzel [1]
4S. Ramesh (Sethu Ramesh) [1]
5Andres Teene [1]
6R. Venkatraman [1]

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