| 2009 |
|---|
| 3 | EE | P. Vijay Suman,
Paritosh K. Pandya:
Determinization and Expressiveness of Integer Reset Timed Automata with Silent Transitions.
LATA 2009: 728-739 |
| 2008 |
|---|
| 2 | EE | Swarup Mohalik,
A. C. Rajeev,
Manoj G. Dixit,
S. Ramesh,
P. Vijay Suman,
Paritosh K. Pandya,
Shengbing Jiang:
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock drifts.
DAC 2008: 296-299 |
| 1 | EE | P. Vijay Suman,
Paritosh K. Pandya,
Shankara Narayanan Krishna,
Lakshmi Manasa:
Timed Automata with Integer Resets: Language Inclusion and Expressiveness.
FORMATS 2008: 78-92 |
