| 2008 |
|---|
| 23 | EE | Deepak D'Souza,
Madhu Gopinathan:
Conflict-Tolerant Features.
CAV 2008: 227-239 |
| 22 | EE | Deepak D'Souza,
Raveendra Holla,
Janardhan Kulkarni,
Raghavendra K. Ramesh,
Barbara Sprick:
On the Decidability of Model-Checking Information Flow Properties.
ICISS 2008: 26-40 |
| 21 | EE | Arnab De,
Abhik Roychoudhury,
Deepak D'Souza:
Java memory model aware software validation.
PASTE 2008: 8-14 |
| 20 | EE | Deepak D'Souza,
Madhu Gopinathan,
S. Ramesh,
Prahladavaradan Sampath:
Conflict-Tolerant Real-Time Features.
QEST 2008: 274-283 |
| 2007 |
|---|
| 19 | EE | Fabrice Chevalier,
Deepak D'Souza,
Pavithra Prabhakar:
Counter-Free Input-Determined Timed Automata.
FORMATS 2007: 82-97 |
| 18 | EE | Stéphane Demri,
Deepak D'Souza,
Régis Gascon:
A Decidable Temporal Logic of Repeating Values.
LFCS 2007: 180-194 |
| 17 | EE | Stéphane Demri,
Deepak D'Souza:
An automata-theoretic approach to constraint LTL.
Inf. Comput. 205(3): 380-415 (2007) |
| 16 | EE | Deepak D'Souza,
Pavithra Prabhakar:
On the expressiveness of MTL in the pointwise and continuous semantics.
STTT 9(1): 1-4 (2007) |
| 2006 |
|---|
| 15 | EE | Pavithra Prabhakar,
Deepak D'Souza:
On the Expressiveness of MTL with Past Operators.
FORMATS 2006: 322-336 |
| 14 | EE | Fabrice Chevalier,
Deepak D'Souza,
Pavithra Prabhakar:
On Continuous Timed Automata with Input-Determined Guards.
FSTTCS 2006: 369-380 |
| 13 | EE | Deepak D'Souza,
Madhu Gopinathan:
Computing Complete Test Graphs for Hierarchical Systems.
SEFM 2006: 70-79 |
| 12 | EE | Deepak D'Souza,
Nicolas Tabareau:
On timed automata with input-determined guards
CoRR abs/cs/0601096: (2006) |
| 2005 |
|---|
| 11 | EE | Deepak D'Souza,
M. Raj Mohan:
Eventual Timed Automata.
FSTTCS 2005: 322-334 |
| 10 | EE | Patricia Bouyer,
Fabrice Chevalier,
Deepak D'Souza:
Fault Diagnosis Using Timed Automata.
FoSSaCS 2005: 219-233 |
| 9 | EE | Deepak D'Souza,
K. R. Raghavendra,
Barbara Sprick:
An Automata Based Approach for Verifying Information Flow Properties.
Electr. Notes Theor. Comput. Sci. 135(1): 39-58 (2005) |
| 2004 |
|---|
| 8 | EE | Deepak D'Souza,
Nicolas Tabareau:
On Timed Automata with Input-Determined Guards.
FORMATS/FTRTFT 2004: 68-83 |
| 2003 |
|---|
| 7 | EE | Patricia Bouyer,
Deepak D'Souza,
P. Madhusudan,
Antoine Petit:
Timed Control with Partial Observability.
CAV 2003: 180-192 |
| 6 | EE | Deepak D'Souza,
Madhavan Mukund:
Checking Consistency of SDL+MSC Specifications.
SPIN 2003: 151-165 |
| 5 | EE | Deepak D'Souza:
A Logical Characterisation of Event Clock Automata.
Int. J. Found. Comput. Sci. 14(4): 625-640 (2003) |
| 2002 |
|---|
| 4 | EE | Stéphane Demri,
Deepak D'Souza:
An Automata-Theoretic Approach to Constraint LTL.
FSTTCS 2002: 121-132 |
| 3 | EE | Deepak D'Souza,
P. Madhusudan:
Timed Control Synthesis for External Specifications.
STACS 2002: 571-582 |
| 2000 |
|---|
| 2 | EE | Deepak D'Souza:
A Logical Characterisation of Event Recording Automata.
FTRTFT 2000: 240-251 |
| 1999 |
|---|
| 1 | EE | Deepak D'Souza,
P. S. Thiagarajan:
Product Interval Automata: A Subclass of Timed Automata.
FSTTCS 1999: 60-71 |
