| 2009 |
|---|
| 10 | EE | Andrew B. Kahng,
Chul-Hong Park,
Puneet Sharma,
Qinke Wang:
Lens aberration aware placement for timing yield.
ACM Trans. Design Autom. Electr. Syst. 14(1): (2009) |
| 2008 |
|---|
| 9 | EE | Kwangok Jeong,
Andrew B. Kahng,
Chul-Hong Park,
Hailong Yao:
Dose map and placement co-optimization for timing yield enhancement and leakage power reduction.
DAC 2008: 516-521 |
| 8 | EE | Andrew B. Kahng,
Chul-Hong Park,
Xu Xu,
Hailong Yao:
Layout decomposition for double patterning lithography.
ICCAD 2008: 465-472 |
| 7 | EE | Andrew B. Kahng,
Chul-Hong Park,
Xu Xu:
Fast Dual-Graph-Based Hotspot Filtering.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1635-1642 (2008) |
| 2007 |
|---|
| 6 | EE | Puneet Gupta,
Andrew B. Kahng,
Chul-Hong Park:
Detailed Placement for Enhanced Control of Resist and Etch CDs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2144-2157 (2007) |
| 2006 |
|---|
| 5 | EE | Andrew B. Kahng,
Chul-Hong Park,
Puneet Sharma,
Qinke Wang:
Lens aberration aware timing-driven placement.
DATE 2006: 890-895 |
| 4 | EE | Puneet Gupta,
Andrew B. Kahng,
Chul-Hong Park,
Kambiz Samadi,
Xu Xu:
Wafer Topography-Aware Optical Proximity Correction.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2747-2756 (2006) |
| 2005 |
|---|
| 3 | EE | Puneet Gupta,
Andrew B. Kahng,
Chul-Hong Park:
Detailed placement for improved depth of focus and CD control.
ASP-DAC 2005: 343-348 |
| 2002 |
|---|
| 2 | EE | Chul-Hong Park,
Soo-Han Choi,
Sang-Uhk Rhie,
Dong-Hyun Kim,
Jun-Seong Park,
Tae-Hwang Jang,
Ji-Soong Park,
Yoo-Hyon Kim,
Moon-Hyun Yoo,
Jeong-Taek Kong:
A Hybrid PPC Method Based on the Empirical Etch Model for the 0.14µm DRAM Generation and Beyond.
ISQED 2002: 143-147 |
| 2000 |
|---|
| 1 | EE | Ji-Soong Park,
Chul-Hong Park,
Sang-Uhk Rhie,
Yoo-Hyon Kim,
Moon-Hyun Yoo,
Jeong-Taek Kong,
Hyung-Woo Kim,
Sun-Il Yoo:
An Efficient Rule-Based OPC Approach Using a DRC Tool for 0.18mum ASIC.
ISQED 2000: 81-86 |
