2008 |
4 | EE | Masayuki Arai,
Satoshi Fukumoto,
Kazuhiko Iwasaki,
Tatsuru Matsuo,
Takahisa Hiraide,
Hideaki Konishi,
Michiaki Emori,
Takashi Aikyo:
Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate.
IEICE Transactions 91-D(3): 726-735 (2008) |
2006 |
3 | EE | Noriyuki Ito,
Akira Kanuma,
Daisuke Maruyama,
Hitoshi Yamanaka,
Tsuyoshi Mochizuki,
Osamu Sugawara,
Chihiro Endoh,
Masahiro Yanagida,
Takeshi Kono,
Yutaka Isoda,
Kazunobu Adachi,
Takahisa Hiraide,
Shigeru Nagasawa,
Yaroku Sugiyama,
Eizo Ninoi:
Delay defect screening for a 2.16GHz SPARC64 microprocessor.
ASP-DAC 2006: 342-347 |
2003 |
2 | EE | Takahisa Hiraide,
Kwame Osei Boateng,
Hideaki Konishi,
Koichi Itaya,
Michiaki Emori,
Hitoshi Yamanaka,
Takashi Mochiyama:
BIST-Aided Scan Test - A New Method for Test Cost Reduction.
VTS 2003: 359-364 |
1987 |
1 | EE | Gotaro Odawara,
Takahisa Hiraide,
Osamu Nishina:
Partitioning and Placement Technique for CMOS Gate Arrays.
IEEE Trans. on CAD of Integrated Circuits and Systems 6(3): 355-363 (1987) |