| |
| 2006 | ||
|---|---|---|
| 4 | EE | Fatemeh Aezinia, S. Najafzadeh, Ali Afzali-Kusha: Novel High Speed and Low Power Single and Double Edge-Triggered Flip-Flops. APCCAS 2006: 1383-1386 |
| 3 | EE | Fatemeh Aezinia, Behjat Forouzandeh: A Novel Low Power NOR gate in SOI CMOS Technology. APCCAS 2006: 1403-1405 |
| 2 | EE | Fatemeh Aezinia, Ali Afzali-Kusha, Caro Lucas: Optimizing High Speed Flip-Flop Using Genetic Algorithm. APCCAS 2006: 1787-1790 |
| 1 | EE | B. Kheradmand-Boroujeni, Fatemeh Aezinia, Ali Afzali-Kusha: High performance circuit techniques for dynamic OR gates. ISCAS 2006 |
| 1 | Ali Afzali-Kusha | [1] [2] [4] |
| 2 | Behjat Forouzandeh | [3] |
| 3 | B. Kheradmand-Boroujeni | [1] |
| 4 | Caro Lucas | [2] |
| 5 | S. Najafzadeh | [4] |