| 2002 |
|---|
| 7 | | David P. LaPotin,
Charles J. Alpert,
John Lillis:
Proceedings of the 8th ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, Monterey, California, USA, December 2-3, 2002
ACM 2002 |
| 1998 |
|---|
| 6 | EE | Arvind Srinivasan,
G. D. Huber,
David P. LaPotin:
Accurate area and delay estimation from RTL descriptions.
IEEE Trans. VLSI Syst. 6(1): 168-172 (1998) |
| 1997 |
|---|
| 5 | EE | Maggie Zhiwei Kang,
Wayne Wei-Ming Dai,
Tom Dillinger,
David P. LaPotin:
Delay bounded buffered tree construction for timing driven floorplanning.
ICCAD 1997: 707-712 |
| 4 | EE | David P. LaPotin,
Uttam Ghoshal,
Eli Chiprout,
Sani R. Nassif:
Physical design challenges for performance.
ISPD 1997: 225-226 |
| 1995 |
|---|
| 3 | | Andreas Kuehlmann,
Arvind Srinivasan,
David P. LaPotin:
Verity - A formal verification program for custom CMOS circuits.
IBM Journal of Research and Development 39(1-2): 149-166 (1995) |
| 1994 |
|---|
| 2 | EE | Andreas Kuehlmann,
David Ihsin Cheng,
Arvind Srinivasan,
David P. LaPotin:
Error Diagnosis for Transistor-Level Verification.
DAC 1994: 218-224 |
| 1993 |
|---|
| 1 | | David P. LaPotin,
Toufie R. Mazzawy,
Marlin L. White:
Early Package Analysis: Considerations and Case Study.
IEEE Computer 26(4): 30-39 (1993) |
