| |
| 1995 | ||
|---|---|---|
| 2 | EE | Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter: Combined DRAM and logic chip for massively parallel systems. ARVLSI 1995: 4-16 |
| 1 | Toshio Sunaga, Koji Hosokawa, Sang H. Dhong, Koji Kitamura: A 64Kb - 32 DRAM for graphics applications. IBM Journal of Research and Development 39(1-2): 43-50 (1995) | |
| 1 | Sang H. Dhong | [1] |
| 2 | Koji Hosokawa | [1] |
| 3 | Koji Kitamura | [1] [2] |
| 4 | Peter M. Kogge | [2] |
| 5 | Hisatada Miyataka | [2] |
| 6 | Eric Retter | [2] |