| 2007 |
|---|
| 3 | EE | Daniel J. Poindexter,
Scott R. Stiffler,
Philip T. Wu,
Paul D. Agnello,
Thomas Ivers,
Shreesh Narasimha,
Thomas B. Faure,
Jed H. Rankin,
David A. Grosch,
Marc D. Knox,
Daniel C. Edelstein,
Mukesh Khare,
Gary B. Bronner,
Hyun-Jang Nam,
Shahid A. Butt:
Optimization of silicon technology for the IBM System z9.
IBM Journal of Research and Development 51(1/2): 5-18 (2007) |
| 2002 |
|---|
| 2 | EE | Paul D. Agnello:
Process requirements for continued scaling of CMOS-the need and prospects for atomic-level manipulation.
IBM Journal of Research and Development 46(2-3): 317-338 (2002) |
| 1995 |
|---|
| 1 | | Randy W. Mann,
Larry A. Clevenger,
Paul D. Agnello,
Francis R. White:
Silicides and local interconnections for high-performance VLSI applications.
IBM Journal of Research and Development 39(4): 403-418 (1995) |
