4. PACS 2004:
Portland,
OR,
USA
Babak Falsafi, T. N. Vijaykumar (Eds.):
Power-Aware Computer Systems, 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004, Revised Selected Papers.
Lecture Notes in Computer Science 3471 Springer 2005, ISBN 3-540-29790-1 BibTeX
Microarchitecture- and Circuit-Level Techniques
- Miquel Pericàs, Rubén González, Adrián Cristal, Alexander V. Veidenbaum, Mateo Valero:
An Optimized Front-End Physical Register File with Banking and Writeback Filtering.
1-14
Electronic Edition (link) BibTeX
- Joseph J. Sharkey, Dmitry Ponomarev, Kanad Ghose, Oguz Ergin:
Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization.
15-29
Electronic Edition (link) BibTeX
- Sumeet Kumar, Prateek Pujara, Aneesh Aggarwal:
Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors.
30-45
Electronic Edition (link) BibTeX
- Eren Kursun, Glenn Reinman, Suleyman Sair, Anahita Shayesteh, Timothy Sherwood:
Low-Overhead Core Swapping for Thermal Management.
46-60
Electronic Edition (link) BibTeX
Power-Aware Memory and Interconnect Systems
- Hai Huang, Kang G. Shin, Charles Lefurgy, Karthick Rajamani, Tom W. Keller, Eric Van Hensbergen, Freeman L. Rawson III:
Software-Hardware Cooperative Power Management for Main Memory.
61-77
Electronic Edition (link) BibTeX
- Yao Guo, Saurabh Chheda, Israel Koren, C. Mani Krishna, Csaba Andras Moritz:
Energy-Aware Data Prefetching for General-Purpose Programs.
78-94
Electronic Edition (link) BibTeX
- Ke Ning, David R. Kaeli:
Bus Power Estimation and Power-Efficient Bus Arbitration for System-on-a-Chip Embedded Systems.
95-106
Electronic Edition (link) BibTeX
- Kartik Mohanram, Scott Rixner:
Context-Independent Codes for Off-Chip Interconnects.
107-119
Electronic Edition (link) BibTeX
Frequency-/Voltage-Scaling Techniques
Copyright © Sat May 16 23:32:16 2009
by Michael Ley (ley@uni-trier.de)
