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2003 | ||
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2 | EE | S. R. Seward, Parag K. Lala: Fault Injection in Digital Logic Circuits at the VHDL Level. IOLTS 2003: 161 |
1 | EE | S. R. Seward, Parag K. Lala: Fault Injection for Verifying Testability at the VHDL Level. ITC 2003: 131-137 |
1 | Parag K. Lala | [1] [2] |