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S. R. Seward

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2003
2EES. R. Seward, Parag K. Lala: Fault Injection in Digital Logic Circuits at the VHDL Level. IOLTS 2003: 161
1EES. R. Seward, Parag K. Lala: Fault Injection for Verifying Testability at the VHDL Level. ITC 2003: 131-137

Coauthor Index

1Parag K. Lala [1] [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)