| 2009 |
|---|
| 83 | EE | Per Stenström,
David B. Whalley:
Introduction.
T. HiPEAC 2: 3 (2009) |
| 82 | EE | Prasad Kulkarni,
David B. Whalley,
Gary S. Tyson,
Jack W. Davidson:
Practical exhaustive optimization phase order exploration and evaluation.
TACO 6(1): (2009) |
| 2008 |
|---|
| 81 | EE | David B. Whalley,
Gary S. Tyson:
Enhancing the effectiveness of utilizing an instruction register file.
IPDPS 2008: 1-5 |
| 80 | EE | Reinhard Wilhelm,
Jakob Engblom,
Andreas Ermedahl,
Niklas Holsti,
Stephan Thesing,
David B. Whalley,
Guillem Bernat,
Christian Ferdinand,
Reinhold Heckmann,
Tulika Mitra,
Frank Mueller,
Isabelle Puaut,
Peter P. Puschner,
Jan Staschulat,
Per Stenström:
The worst-case execution-time problem - overview of methods and survey of tools.
ACM Trans. Embedded Comput. Syst. 7(3): (2008) |
| 2007 |
|---|
| 79 | | Koen De Bosschere,
David R. Kaeli,
Per Stenström,
David B. Whalley,
Theo Ungerer:
High Performance Embedded Architectures and Compilers, Second International Conference, HiPEAC 2007, Ghent, Belgium, January 28-30, 2007, Proceedings
Springer 2007 |
| 78 | EE | Chris Zimmer,
Stephen Roderick Hines,
Prasad Kulkarni,
Gary S. Tyson,
David B. Whalley:
Facilitating compiler optimizations through the dynamic mapping of alternate register structures.
CASES 2007: 165-169 |
| 77 | EE | Prasad Kulkarni,
David B. Whalley,
Gary S. Tyson:
Evaluating Heuristic Optimization Phase Order Search Algorithms.
CGO 2007: 157-169 |
| 76 | EE | Joel Coffman,
Christopher A. Healy,
Frank Mueller,
David B. Whalley:
Generalizing parametric timing analysis.
LCTES 2007: 152-154 |
| 75 | EE | Stephen Roderick Hines,
Gary S. Tyson,
David B. Whalley:
Addressing instruction fetch bottlenecks by using an instruction register file.
LCTES 2007: 165-174 |
| 74 | EE | Stephen Hines,
David B. Whalley,
Gary S. Tyson:
Guaranteeing Hits to Improve the Efficiency of a Small Instruction Cache.
MICRO 2007: 433-444 |
| 73 | EE | Jason Hiser,
Jack W. Davidson,
David B. Whalley:
Fast, accurate design space exploration of embedded systems memory configurations.
SAC 2007: 699-706 |
| 72 | EE | David B. Whalley:
Guest Editorial.
ACM Trans. Embedded Comput. Syst. 6(1): (2007) |
| 2006 |
|---|
| 71 | EE | Stephen Hines,
David B. Whalley,
Gary S. Tyson:
Adapting compilation techniques to enhance the packing of instructions into registers.
CASES 2006: 43-53 |
| 70 | EE | Prasad Kulkarni,
David B. Whalley,
Gary S. Tyson,
Jack W. Davidson:
Exhaustive Optimization Phase Order Space Exploration.
CGO 2006: 306-318 |
| 69 | EE | William C. Kreahling,
Stephen Hines,
David B. Whalley,
Gary S. Tyson:
Reducing the cost of conditional transfers of control by using comparison specifications.
LCTES 2006: 64-71 |
| 68 | EE | Prasad Kulkarni,
David B. Whalley,
Gary S. Tyson,
Jack W. Davidson:
In search of near-optimal optimization phase orderings.
LCTES 2006: 83-92 |
| 67 | EE | Prasad Kulkarni,
Wankang Zhao,
Stephen Hines,
David B. Whalley,
Xin Yuan,
Robert van Engelen,
Kyle Gallivan,
Jason Hiser,
Jack W. Davidson,
Baosheng Cai,
Mark W. Bailey,
Hwashin Moon,
Kyunghwan Cho,
Yunheung Paek:
VISTA: VPO interactive system for tuning applications.
ACM Trans. Embedded Comput. Syst. 5(4): 819-863 (2006) |
| 66 | EE | Wankang Zhao,
William C. Kreahling,
David B. Whalley,
Christopher A. Healy,
Frank Mueller:
Improving WCET by applying worst-case path optimizations.
Real-Time Systems 34(2): 129-152 (2006) |
| 2005 |
|---|
| 65 | EE | Stephen Hines,
Prasad Kulkarni,
David B. Whalley,
Jack W. Davidson:
Using de-optimization to re-optimize code.
EMSOFT 2005: 114-123 |
| 64 | EE | R. Clint Whaley,
David B. Whalley:
Tuning High Performance Kernels through Empirical Compilation.
ICPP 2005: 89-98 |
| 63 | EE | Wankang Zhao,
William C. Kreahling,
David B. Whalley,
Christopher A. Healy,
Frank Mueller:
Improving WCET by Optimizing Worst-Case Paths.
IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 138-147 |
| 62 | EE | Sibin Mohan,
Frank Mueller,
David B. Whalley,
Christopher A. Healy:
Timing Analysis for Sensor Network Nodes of the Atmega Processor Family.
IEEE Real-Time and Embedded Technology and Applications Symposium 2005: 405-414 |
| 61 | EE | Stephen Hines,
Joshua Green,
Gary S. Tyson,
David B. Whalley:
Improving Program Efficiency by Packing Instructions into Registers.
ISCA 2005: 260-271 |
| 60 | EE | Stephen Hines,
Gary S. Tyson,
David B. Whalley:
Reducing Instruction Fetch Cost by Packing Instructions into RegisterWindows.
MICRO 2005: 19-29 |
| 59 | EE | Sibin Mohan,
Frank Mueller,
William Hawkins,
Michael Root,
Christopher A. Healy,
David B. Whalley:
ParaScale: Exploiting Parametric Timing Analysis for Real-Time Schedulers and Dynamic Voltage Scaling.
RTSS 2005: 233-242 |
| 58 | EE | William C. Kreahling,
David B. Whalley,
Mark W. Bailey,
Xin Yuan,
Gang-Ryung Uh,
Robert van Engelen:
Branch elimination by condition merging.
Softw., Pract. Exper. 35(1): 51-74 (2005) |
| 57 | EE | Gang-Ryung Uh,
Yuhong Wang,
David B. Whalley,
Sanjay Jinturkar,
Yunheung Paek,
Vincent Cao,
Chris Burns:
Compiler transformations for effectively exploiting a zero overhead loop buffer.
Softw., Pract. Exper. 35(4): 393-412 (2005) |
| 56 | EE | Prasad Kulkarni,
Stephen Hines,
David B. Whalley,
Jason Hiser,
Jack W. Davidson,
Douglas L. Jones:
Fast and efficient searches for effective optimization-phase sequences.
TACO 2(2): 165-198 (2005) |
| 55 | EE | Wankang Zhao,
David B. Whalley,
Christopher A. Healy,
Frank Mueller:
Improving WCET by applying a WC code-positioning optimization.
TACO 2(4): 335-365 (2005) |
| 2004 |
|---|
| 54 | EE | Wankang Zhao,
Prasad Kulkarni,
David B. Whalley,
Christopher A. Healy,
Frank Mueller,
Gang-Ryung Uh:
Tuning the WCET of Embedded Applications.
IEEE Real-Time and Embedded Technology and Applications Symposium 2004: 472-481 |
| 53 | EE | Prasad Kulkarni,
Stephen Hines,
Jason Hiser,
David B. Whalley,
Jack W. Davidson,
Douglas L. Jones:
Fast searches for effective optimization phase sequences.
PLDI 2004: 171-182 |
| 52 | EE | Wankang Zhao,
David B. Whalley,
Christopher A. Healy,
Frank Mueller:
WCET Code Positioning.
RTSS 2004: 81-91 |
| 51 | EE | Jeonghun Cho,
Yunheung Paek,
David B. Whalley:
Fast memory bank assignment for fixed-point digital signal processors.
ACM Trans. Design Autom. Electr. Syst. 9(1): 52-74 (2004) |
| 50 | EE | Robert van Engelen,
David B. Whalley,
Xin Yuan:
Automatic validation of code-improving transformations on low-level program representations.
Sci. Comput. Program. 52: 257-280 (2004) |
| 2003 |
|---|
| 49 | EE | William C. Kreahling,
David B. Whalley,
Mark W. Bailey,
Xin Yuan,
Gang-Ryung Uh,
Robert van Engelen:
Branch Elimination via Multi-variable Condition Merging.
Euro-Par 2003: 261-270 |
| 48 | EE | Prasad Kulkarni,
Wankang Zhao,
Hwashin Moon,
Kyunghwan Cho,
David B. Whalley,
Jack W. Davidson,
Mark W. Bailey,
Yunheung Paek,
Kyle Gallivan:
Finding effective optimization phase sequences.
LCTES 2003: 12-23 |
| 47 | | Robert van Engelen,
David B. Whalley,
Xin Yuan:
Validation of Code-Improving Transformations for Embedded Systems.
SAC 2003: 684-691 |
| 46 | | Reinhard Wilhelm,
Jakob Engblom,
Stephan Thesing,
David B. Whalley:
Industrial Requirements for WCET Tools - Answers to the ARTIST Questionnaire.
WCET 2003: 39-43 |
| 2002 |
|---|
| 45 | EE | Jeonghun Cho,
Yunheung Paek,
David B. Whalley:
Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms.
LCTES-SCOPES 2002: 130-138 |
| 44 | EE | Wankang Zhao,
Baosheng Cai,
David B. Whalley,
Mark W. Bailey,
Robert van Engelen,
Xin Yuan,
Jason Hiser,
Jack W. Davidson,
Kyle Gallivan,
Douglas L. Jones:
VISTA: a system for interactive code improvement.
LCTES-SCOPES 2002: 155-164 |
| 43 | EE | Minghui Yang,
Gang-Ryung Uh,
David B. Whalley:
Efficient and effective branch reordering using profile data.
ACM Trans. Program. Lang. Syst. 24(6): 667-697 (2002) |
| 42 | EE | Christopher A. Healy,
David B. Whalley:
Automatic Detection and Exploitation of Branch Constraints for Timing Analysis.
IEEE Trans. Software Eng. 28(8): 763-781 (2002) |
| 2001 |
|---|
| 41 | EE | Apan Qasem,
David B. Whalley,
Xin Yuan,
Robert van Engelen:
Using a Swap Instruction to Coalesce Loads and Stores.
Euro-Par 2001: 235-240 |
| 40 | EE | John M. Mellor-Crummey,
Robert J. Fowler,
David B. Whalley:
Tools for application-oriented performance tuning.
ICS 2001: 154-165 |
| 39 | | Emilio Vivancos,
Christopher A. Healy,
Frank Mueller,
David B. Whalley:
Parametric Timing Analysis.
LCTES/OM 2001: 88-93 |
| 38 | EE | John M. Mellor-Crummey,
Robert J. Fowler,
David B. Whalley:
On providing useful information for analyzing and tuning applications.
SIGMETRICS/Performance 2001: 332-333 |
| 37 | | John M. Mellor-Crummey,
David B. Whalley,
Ken Kennedy:
Improving Memory Hierarchy Performance for Irregular Applications Using Data and Computation Reorderings.
International Journal of Parallel Programming 29(3): 217-247 (2001) |
| 2000 |
|---|
| 36 | EE | Gang-Ryung Uh,
Yuhong Wang,
David B. Whalley,
Sanjay Jinturkar,
Chris Burns,
Vincent Cao:
Techniques for Effectively Exploiting a Zero Overhead Loop Buffer.
CC 2000: 157-172 |
| 35 | EE | Robert van Engelen,
David B. Whalley,
Xin Yuan:
Automatic Validation of Code-Improving Transformations.
LCTES 2000: 206-210 |
| 34 | | Christopher A. Healy,
Mikael Sjödin,
Viresh Rustagi,
David B. Whalley,
Robert van Engelen:
Supporting Timing Analysis by Automatic Bounding of Loop Iterations.
Real-Time Systems 18(2/3): 129-156 (2000) |
| 1999 |
|---|
| 33 | EE | Christopher A. Healy,
David B. Whalley:
Tighter Timing Predictions by Automatic Detection and Exploitation of Value-Dependent Constraints.
IEEE Real Time Technology and Applications Symposium 1999: 79-88 |
| 32 | EE | John M. Mellor-Crummey,
David B. Whalley,
Ken Kennedy:
Improving memory hierarchy performance for irregular applications.
International Conference on Supercomputing 1999: 425-433 |
| 31 | EE | Gang-Ryung Uh,
Yuhong Wang,
David B. Whalley,
Sanjay Jinturkar,
Chris Burns,
Vincent Cao:
Effective Exploitation of a Zero Overhead Loop Buffer.
Workshop on Languages, Compilers, and Tools for Embedded Systems 1999: 10-19 |
| 30 | EE | Christopher A. Healy,
Robert D. Arnold,
Frank Mueller,
David B. Whalley,
Marion G. Harmon:
Bounding Pipeline and Instruction Cache Performance.
IEEE Trans. Computers 48(1): 53-70 (1999) |
| 29 | | Randall T. White,
Frank Mueller,
Christopher A. Healy,
David B. Whalley,
Marion G. Harmon:
Timing Analysis for Data and Wrap-Around Fill Caches.
Real-Time Systems 17(2-3): 209-233 (1999) |
| 28 | | Lo Ko,
Naghan Al-Yaqoubi,
Christopher A. Healy,
Emily Ratliff,
Robert D. Arnold,
David B. Whalley,
Marion G. Harmon:
Timing Constraint Specification and Analysis.
Softw., Pract. Exper. 29(1): 77-98 (1999) |
| 27 | | Gang-Ryung Uh,
David B. Whalley:
Effectively Exploiting Indirect Jumps.
Softw., Pract. Exper. 29(12): 1061-1101 (1999) |
| 1998 |
|---|
| 26 | EE | Christopher A. Healy,
Mikael Sjödin,
Viresh Rustagi,
David B. Whalley:
Bounding Loop Iterations for Timing Analysis.
IEEE Real Time Technology and Applications Symposium 1998: 12-21 |
| 25 | | Minghui Yang,
Gang-Ryung Uh,
David B. Whalley:
Improving Performance by Branch Reordering.
PLDI 1998: 130-141 |
| 1997 |
|---|
| 24 | EE | Randall T. White,
Christopher A. Healy,
David B. Whalley,
Frank Mueller,
Marion G. Harmon:
Timing Analysis for Data Caches and Set-Associative Caches.
IEEE Real Time Technology and Applications Symposium 1997: 192-202 |
| 23 | | Gang-Ryung Uh,
David B. Whalley:
Coalescing Conditional Branches into Efficient Indirect Jumps.
SAS 1997: 315-329 |
| 1996 |
|---|
| 22 | EE | Lo Ko,
Christopher A. Healy,
Emily Ratliff,
Robert D. Arnold,
David B. Whalley,
Marion G. Harmon:
Supporting the specification and analysis of timing constraints.
IEEE Real Time Technology and Applications Symposium 1996: 170- |
| 1995 |
|---|
| 21 | EE | Frank Mueller,
David B. Whalley:
Fast instruction cache analysis via static cache simulation.
Annual Simulation Symposium 1995: 105-114 |
| 20 | | Christopher A. Healy,
David B. Whalley,
Marion G. Harmon:
Integrating the Timing Analysis of Pipelining and Instruction Caching.
IEEE Real-Time Systems Symposium 1995: 288-297 |
| 19 | | Frank Mueller,
David B. Whalley:
Avoiding Conditional Branches by Code Replication.
PLDI 1995: 56-66 |
| 18 | | Richard Gerber,
Steven W. K. Tjiang,
David B. Whalley,
David Wilner,
Michael Wolfe:
Appropriate Interfaces Between Design Tools, Languages, Compilers and Runtimes in Real-Time Systems (Panel).
Workshop on Languages, Compilers, & Tools for Real-Time Systems 1995: 124 |
| 17 | | Lo Ko,
David B. Whalley,
Marion G. Harmon:
Supporting User-Friendly Analysis of Timing Constraints.
Workshop on Languages, Compilers, & Tools for Real-Time Systems 1995: 99-107 |
| 16 | EE | Mickey R. Boyd,
David B. Whalley:
Graphical visualization of compiler optimizations.
J. Prog. Lang. 3(2): (1995) |
| 1994 |
|---|
| 15 | | Robert D. Arnold,
Frank Mueller,
David B. Whalley,
Marion G. Harmon:
Bounding Worst-Case Instruction Cache Performance.
IEEE Real-Time Systems Symposium 1994: 172-181 |
| 14 | | Frank Mueller,
David B. Whalley,
Marion G. Harmon:
Real-Time Debugging by Minimal Hardware Simulation.
PEARL 1994: 68-76 |
| 13 | | Frank Mueller,
David B. Whalley:
Efficient On-the-fly Analysis of Program Behavior and Static Cache Simulation.
SAS 1994: 101-115 |
| 12 | EE | David B. Whalley:
Automatic Isolation of Compiler Errors.
ACM Trans. Program. Lang. Syst. 16(5): 1648-1659 (1994) |
| 11 | | Marion G. Harmon,
Theodore P. Baker,
David B. Whalley:
A Retargetable Technique for Predicting Execution Time of Code Segments.
Real-Time Systems 7(2): 159-182 (1994) |
| 1993 |
|---|
| 10 | | Mickey R. Boyd,
David B. Whalley:
Isolation and Analysis of Optimization Errors.
PLDI 1993: 26-35 |
| 9 | | David B. Whalley:
Techniques for Fast Instruction Cache Performance Evaluation.
Softw., Pract. Exper. 23(1): 95-118 (1993) |
| 1992 |
|---|
| 8 | EE | Marion G. Harmon,
Theodore P. Baker,
David B. Whalley:
A Retargetable Technique for Predicting Execution Time.
IEEE Real-Time Systems Symposium 1992: 68-77 |
| 7 | | Frank Mueller,
David B. Whalley:
Avoiding Unconditional Jumps by Code Replication.
PLDI 1992: 322-330 |
| 6 | | David B. Whalley:
Fast Instruction Cache Performance Evaluation Using Compile-Time Analysis.
SIGMETRICS 1992: 13-22 |
| 5 | | Jack W. Davidson,
John R. Rabung,
David B. Whalley:
Relating Static and Dynamic Machine Code Measurements.
IEEE Trans. Computers 41(4): 444-454 (1992) |
| 1991 |
|---|
| 4 | | Jack W. Davidson,
David B. Whalley:
Methods for Saving and Restoring Register Values across Function Calls.
Softw., Pract. Exper. 21(2): 149-165 (1991) |
| 1990 |
|---|
| 3 | | Jack W. Davidson,
David B. Whalley:
Reducing the Cost of Branches by Using Registers.
ISCA 1990: 182-191 |
| 2 | EE | Jack W. Davidson,
David B. Whalley:
Ease: An Environment for Architecture Study and Experimentation.
SIGMETRICS 1990: 259-260 |
| 1989 |
|---|
| 1 | | Jack W. Davidson,
David B. Whalley:
Quick Compilers Using Peephole Optimization.
Softw., Pract. Exper. 19(1): 79-97 (1989) |
