| 2008 |
| 23 | EE | Cheng Wu,
Waleed Meleis:
Adaptive Kanerva-based function approximation for multi-agent systems.
AAMAS (3) 2008: 1361-1364 |
| 2006 |
| 22 | EE | Juemin Zhang,
Waleed Meleis,
David R. Kaeli,
Tao Wu:
Acceleration of Maximum Likelihood Estimation for Tomosynthesis Mammography.
ICPADS (1) 2006: 291-299 |
| 21 | EE | Morteza Fayyazi,
David R. Kaeli,
Waleed Meleis:
An adjustable linear time parallel algorithm for maximum weight bipartite matching.
Inf. Process. Lett. 97(5): 186-190 (2006) |
| 2004 |
| 20 | EE | Morteza Fayyazi,
David R. Kaeli,
Waleed Meleis:
Parallel Maximum Weight Bipartite Matching Algorithms for Scheduling in Input-Queued Switches.
IPDPS 2004 |
| 2003 |
| 19 | EE | Heather Quinn,
Laurie A. Smith King,
Miriam Leeser,
Waleed Meleis:
Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines.
FCCM 2003: 173- |
| 2002 |
| 18 | EE | Farzin Karimi,
Waleed Meleis,
Zainalabedin Navabi,
Fabrizio Lombardi:
Data Compression for System-on-Chip Testing Using ATE.
DFT 2002: 166-176 |
| 17 | EE | Ivan D. Baev,
Waleed Meleis,
Alexandre E. Eichenberger:
An Experimental Study of Algorithms for Weighted Completion Time Scheduling.
Algorithmica 33(1): 34-51 (2002) |
| 16 | EE | Ivan D. Baev,
Waleed Meleis,
Alexandre E. Eichenberger:
Lower bounds on precedence-constrained scheduling for parallel processors.
Inf. Process. Lett. 83(1): 27-32 (2002) |
| 15 | | Ivan D. Baev,
Waleed Meleis,
Santosh G. Abraham:
Backtracking-Based Instruction Scheduling to Fill Branch Delay Slots.
International Journal of Parallel Programming 30(6): 397-418 (2002) |
| 2001 |
| 14 | EE | Waleed Meleis,
Alexandre E. Eichenberger,
Ivan D. Baev:
Scheduling Superblocks with Bound-Based Branch Trade-Offs.
IEEE Trans. Computers 50(8): 784-797 (2001) |
| 2000 |
| 13 | EE | Ivan D. Baev,
Waleed Meleis,
Alexandre E. Eichenberger:
Lower Bounds on Precedence-Constrained Scheduling for Parallel Processors.
ICPP 2000: 549-554 |
| 12 | EE | Santosh G. Abraham,
Waleed Meleis,
Ivan D. Baev:
Efficient Backtracking Instruction Schedulers.
IEEE PACT 2000: 301-308 |
| 11 | EE | Alexandre E. Eichenberger,
Waleed Meleis,
Suman Maradani:
An integrated approach to accelerate data and predicate computations in hyperblocks.
MICRO 2000: 101-111 |
| 10 | EE | Waleed Meleis:
Dual-Issue Scheduling for Binary Trees with Spills and Pipelined Loads.
SIAM J. Comput. 30(6): 1921-1941 (2000) |
| 1999 |
| 9 | EE | Alexandre E. Eichenberger,
Waleed Meleis:
Balance Scheduling: Weighting Branch Tradeoffs in Superblocks.
MICRO 1999: 272-283 |
| 8 | EE | Waleed Meleis,
Edward S. Davidson:
Dual-Issue Scheduling with Spills for Binary Trees.
SODA 1999: 678-686 |
| 7 | EE | Ivan D. Baev,
Waleed Meleis,
Alexandre E. Eichenberger:
Algorithms for Total Weighted Completion Time Scheduling.
SODA 1999: 852-853 |
| 6 | EE | John Kalamatianos,
Alireza Khalafi,
David R. Kaeli,
Waleed Meleis:
Analysis of Temporal-Based Program Behavior for Improved Instruction Cache Performance.
IEEE Trans. Computers 48(2): 168-175 (1999) |
| 1998 |
| 5 | EE | Jason P. Casmira,
John Fraser,
David R. Kaeli,
Waleed Meleis:
Operating System Impact on Trace-Driven Simulation.
Annual Simulation Symposium 1998: 76-82 |
| 4 | EE | Miriam Leeser,
Waleed Meleis,
Mankuan Michael Vai,
Silviu M. S. A. Chiricescu,
Weidong Xu,
Paul M. Zavracky:
Rothko: A Three-Dimensional FPGA.
IEEE Design & Test of Computers 15(1): 16-23 (1998) |
| 1997 |
| 3 | EE | Waleed Meleis,
Miriam Leeser,
Paul M. Zavracky,
Mankuan Michael Vai:
Architectural Design of a Three Dimensional FPGA.
ARVLSI 1997: 256-269 |
| 2 | | Miriam Leeser,
Waleed Meleis,
Mankuan Michael Vai,
Paul M. Zavracky:
Rothko: A three dimensional FPGA architecture, its fabrication, and design tools.
FPL 1997: 21-30 |
| 1994 |
| 1 | EE | Waleed Meleis,
Edward S. Davidson:
Optimal local register allocation for a multiple-issue machine.
International Conference on Supercomputing 1994: 107-116 |