SAMOS 2007: Samos, Greece

Stamatis Vassiliadis, Mladen Berekovic, Timo D. Hämäläinen (Eds.): Embedded Computer Systems: Architectures, Modeling, and Simulation, 7th International Workshop, SAMOS 2007, Samos, Greece, July 16-19, 2007, Proceedings. Lecture Notes in Computer Science 4599 Springer 2007, ISBN 978-3-540-73622-6 BibTeX

Keynotes

Willie Anderson:
Software Is the Answer But What Is the Question? 1
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Jos Huisken:
Integrating VLIW Processors with a Network on Chip. 2
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System Modeling and Simulation

Taewook Oh, Youngmin Yi, Soonhoi Ha:
Communication Architecture Simulation on the Virtual Synchronization Framework. 3-12
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Max R. de O. Schultz, Alexandre K. I. Mendonça, Felipe G. Carvalho, Olinto J. V. Furtado, Luiz C. V. dos Santos:
A Model-Driven Automatically-Retargetable Debug Tool for Embedded Systems. 13-23
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Sangsoo Park, Heonshik Shin:
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration. 24-33
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Ka Lok Man, Andrea Fedeli, Michele Mercaldi, Menouer Boubekeur, Michel P. Schellekens:
SC2SCFL: Automated SystemC to SystemC^FL Translation. 34-45
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VLSI Architectures

Seungjae Baek, Jongmoo Choi, Donghee Lee, Sam H. Noh:
Model and Validation of Block Cleaning Cost for Flash Memory. 46-54
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Sungchan Park, Chao Chen, Hong Jeong:
VLSI Architecture for MRF Based Stereo Matching. 55-64
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Teemu Pitkänen, Tero Partanen, Jarmo Takala:
Low-Power Twiddle Factor Unit for FFT Computation. 65-74
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Pepijn J. de Langen, Ben H. H. Juurlink:
Trade-Offs Between Voltage Scaling and Processor Shutdown for Low-Energy Embedded Multiprocessors. 75-85
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Scheduling & Programming Models

José O. Carlomagno Filho, Luiz F. P. Santos, Luiz C. V. dos Santos:
An Automatically-Retargetable Time-Constraint-Driven Instruction Scheduler for Post-compiling Optimization of Embedded Code. 86-95
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Norbert Esser, Renga Sundararajan, Joachim Trescher:
Improving TriMedia Cache Performance by Profile Guided Code Reordering. 96-106
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Paul Carpenter, David Ródenas, Xavier Martorell, Alex Ramírez, Eduard Ayguadé:
A Streaming Machine Description and Programming Model. 107-116
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Multi-processor Architectures

Bastian Ristau, Gerhard Fettweis:
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing. 117-126
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Thomas A. M. Bernard, Chris R. Jesshope, Peter M. W. Knijnenburg:
Strategies for Compiling µ TC to Novel Chip Multiprocessors. 127-138
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Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit:
Image Quantisation on a Massively Parallel Embedded Processor. 139-148
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Michael G. Benjamin, David R. Kaeli:
Stream Image Processing on a Dual-Core Embedded System. 149-158
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Reconfigurable Architectures

Marco Lanuzza, Stefania Perri, Pasquale Corsonello:
MORA: A New Coarse-Grain Reconfigurable Array for High Throughput Multimedia Processing. 159-168
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Hendrik Eeckhaut, Harald Devos, Philippe Faes, Mark Christiaens, Dirk Stroobandt:
FPGA Design Methodology for a Wavelet-Based Scalable Video Decoder. 169-178
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Ari Kulmala, Erno Salminen, Timo D. Hämäläinen:
Evaluating Large System-on-Chip on Multi-FPGA Platform. 179-189
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Design Space Exploration

Hartwig Jeschke:
Efficiency Measures for Multimedia SOCs. 190-199
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Je-Hoon Lee, Young-Sin Cho, Seok-Man Kim, Kyoung-Rok Cho:
On-Chip Bus Modeling for Power and Performance Estimation. 200-210
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Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert:
A Framework Introducing Model Reversibility in SoC Design Space Exploration. 211-221
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Mark Thompson, Andy D. Pimentel:
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration. 222-232
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Processor Components

Pekka Jääskeläinen, Vladimír Guzma, Jarmo Takala:
Resource Conflict Detection in Simulation of Function Unit Pipelines. 233-240
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Holger Flatt, Sebastian Hesselbarth, Sebastian Flügel, Peter Pirsch:
A Modular Coprocessor Architecture for Embedded Real-Time Image and Video Signal Processing. 241-250
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Humberto Calderon, Carlo Galuzzi, Georgi Gaydadjiev, Stamatis Vassiliadis:
High-Bandwidth Address Generation Unit. 251-262
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Sascha Uhrig, Jörg Mische, Theo Ungerer:
An IP Core for Embedded Java Systems. 263-272
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Embedded Processors

Jarno K. Tanskanen, Teemu Pitkänen, Risto Mäkinen, Jarmo Takala:
Parallel Memory Architecture for TTA Processor. 273-282
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Carlo Galuzzi, Koen Bertels, Stamatis Vassiliadis:
A Linear Complexity Algorithm for the Generation of Multiple Input Single Output Instructions of Variable Size. 283-293
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Nainesh Agarwal, Nikitas J. Dimopoulos:
Automated Power Gating of Registers Using CoDeL and FSM Branch Prediction. 294-303
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Paolo Bonzini, Dilek Harmanci, Laura Pozzi:
A Study of Energy Saving in Customizable Processors. 304-312
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SoC for SDR

John Glossner, Daniel Iancu, Mayan Moudgill, Michael J. Schulte, Stamatis Vassiliadis:
Trends in Low Power Handset Software Defined Radio. 313-321
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Thomas Schuster, Bruno Bougard, Praveen Raghavan, Robert Priewasser, David Novo, Liesbet Van der Perre, Francky Catthoor:
Design of a Low Power Pre-synchronization ASIP for Multimode SDR Terminals. 322-332
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Anders Nilsson, Dake Liu:
Area Efficient Fully Programmable Baseband Processors. 333-342
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Mark Woh, Sangwon Seo, Hyunseok Lee, Yuan Lin, Scott A. Mahlke, Trevor N. Mudge, Chaitali Chakrabarti, Krisztián Flautner:
The Next Generation Challenge for Software Defined Radio. 343-354
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Chia-han Lee, Wayne Wolf:
Design Methodology for Software Radio Systems. 355-364
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Tseesuren Batsuuri, Je-Hoon Lee, Kyoung-Rok Cho:
Power Efficient Co-simulation Framework for a Wireless Application Using Platform Based SoC. 365-374
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Shashank Mittal, Md. Zafar Ali Khan, M. B. Srinivas:
A Comparative Study of Different FFT Architectures for Software Defined Radio. 375-384
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Wireless Sensors

Lennart Yseboodt, Michael De Nil, Jos Huisken, Mladen Berekovic, Qin Zhao, Frank Bouwens, Jef L. van Meerbergen:
Design of 100 muW Wireless Sensor Nodes on Energy Scavengers for Biomedical Monitoring. 385-395
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Mauri Kuorilehto, Jukka Suhonen, Marko Hännikäinen, Timo D. Hämäläinen:
Tool-Aided Design and Implementation of Indoor Surveillance Wireless Sensor Network. 396-407
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Aubin Lecointre, Daniela Dragomirescu, Robert Plana:
System Architecture Modeling of an UWB Receiver for Wireless Sensor Network. 408-420
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Zhong-Yi Jin, Curt Schurgers, Rajesh K. Gupta:
An Embedded Platform with Duty-Cycled Radio and Processing Subsystems for Wireless Sensor Networks. 421-430
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Mauri Kuorilehto, Timo Alho, Marko Hännikäinen, Timo D. Hämäläinen:
SensorOS: A New Operating System for Time Critical WSN Applications. 431-442
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Panu Hämäläinen, Marko Hännikäinen, Timo D. Hämäläinen:
Review of Hardware Architectures for Advanced Encryption Standard Implementations Considering Wireless Sensor Networks. 443-453
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Dong-Min Son, Young-Bae Ko:
k ⁺ Neigh : An Energy Efficient Topology Control for Wireless Sensor Networks. 454-463
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