F. Vestman
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1997
1
Dominique Borrione
, F. Vestman,
H. Bouamama
: An approach to Verilog-VHDL interoperability for synchronous designs.
CHARME 1997
: 65-87
Coauthor
Index
1
Dominique Borrione
[
1
]
2
H. Bouamama
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
