Antoine Sirianni

2003
2	EE	Dominique Borrione, Menouer Boubekeur, Emil Dumitrescu, Marc Renaudin, Jean-Baptiste Rigaud, Antoine Sirianni: An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow. HICSS 2003: 279
1		Dominique Borrione, Menouer Boubekeur, Laurent Mounier, Marc Renaudin, Antoine Sirianni: Validation of asynchronous circuit specifications using IF/CADP. VLSI-SOC 2003: 86-91

Coauthor Index

1	Dominique Borrione	[1] [2]
2	Menouer Boubekeur	[1] [2]
3	Emil Dumitrescu	[2]
4	Laurent Mounier	[1]
5	Marc Renaudin	[1] [2]
6	Jean-Baptiste Rigaud	[2]