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Akhilesh Kumar

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2009
18EEAkhilesh Kumar, Mohab Anis: IR-drop management CAD techniques in FPGAs for power grid reliability. ISQED 2009: 746-752
2008
17EEAkhilesh Kumar, Finn Tseng, Yan Guo, Ratna Babu Chinnam: Hidden-Markov model based sequential clustering for autonomous diagnostics. IJCNN 2008: 3345-3351
2007
16EEAkhilesh Kumar, Mohab Anis: Dual-Threshold CAD Framework for Subthreshold Leakage Power Aware FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 53-66 (2007)
2006
15EEAkhilesh Kumar, Mohab Anis: An analytical state dependent leakage power model for FPGAs. DATE 2006: 612-617
14EEAkhilesh Kumar, Mohab Anis: Dual-Vt Design of FPGAs for Subthreshold Leakage Tolerance. ISQED 2006: 735-740
13EEAkhilesh Kumar, Prakash, M. K. Tiwari, Ravi Shankar, Alok Baveja: Solving machine-loading problem of a flexible manufacturing system with constraint-based genetic algorithm. European Journal of Operational Research 175(2): 1043-1069 (2006)
12EEAkhilesh Kumar, Anuj Prakash, Ravi Shankar, M. K. Tiwari: Psycho-Clonal algorithm based approach to solve continuous flow shop scheduling problem. Expert Syst. Appl. 31(3): 504-514 (2006)
2005
11EEAkhilesh Kumar, Mohab Anis: Dual-Vt FPGA design for leakage power reduction (abstract only). FPGA 2005: 272
2003
10EEMani Azimi, Ching-Tsun Chou, Akhilesh Kumar, Victor W. Lee, Phanindra K. Mannava, Seungjoon Park: Experience with Applying Formal Methods to Protocol Specification and System Architecture. Formal Methods in System Design 22(2): 109-116 (2003)
2002
9EEMani Azimi, Faye A. Briggs, Michel Cekleov, Manoj Khare, Akhilesh Kumar, Lily Pao Looi: Scalability Port: A Coherent Interface for Shared Memory Multiprocessors. Hot Interconnects 2002: 65-70
8EEFaye A. Briggs, Michel Cekleov, Ken Creta, Manoj Khare, Steve Kulick, Akhilesh Kumar, Lily Pao Looi, Chitra Natarajan, Sivakumar Radhakrishnan, Linda Rankin: Intel 870: A Building Block for Cost-Effective, Scalable Servers. IEEE Micro 22(2): 36-47 (2002)
2000
7EELaxmi N. Bhuyan, Ravi R. Iyer, Hu-Jun Wang, Akhilesh Kumar: Impact of CC-NUMA Memory Management Policies on the Application Performance of Multistage Switching Networks. IEEE Trans. Parallel Distrib. Syst. 11(3): 230-246 (2000)
1998
6EELaxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhilesh Kumar: Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors. IPPS/SPDP 1998: 466-474
1996
5EEAkhilesh Kumar, Laxmi N. Bhuyan: Evaluating Virtual Channels for Cache-Coherent Shared-Memory Multiprocessors. International Conference on Supercomputing 1996: 253-260
1994
4 Yeimkuan Chang, Laxmi N. Bhuyan, Akhilesh Kumar: A Distributed Cache Coherence Protocol for Hypercube Multiprocessors. ICPP (1) 1994: 150-157
3EEAkhilesh Kumar, Phanindra K. Mannava, Laxmi N. Bhuyan: Efficient and scalable cache coherence schemes for shared memory hypercube multiprocessors. SC 1994: 498-507
1993
2 Akhilesh Kumar, Laxmi N. Bhuyan: Parallel FFT Algorithms for Cache Based Shared Memory Multiprocessors. ICPP 1993: 23-27
1992
1 Rabi N. Mahapatra, Akhilesh Kumar: Vector Hartley Transform Employing Multiprocessors. IPPS 1992: 250-253

Coauthor Index

1Mohab Anis [11] [14] [15] [16] [18]
2Mani Azimi [9] [10]
3Alok Baveja [13]
4Laxmi N. Bhuyan [2] [3] [4] [5] [6] [7]
5Faye A. Briggs [8] [9]
6Michel Cekleov [8] [9]
7Yeimkuan Chang [4]
8Ratna Babu Chinnam [17]
9Ching-Tsun Chou [10]
10Ken Creta [8]
11Yan Guo [17]
12Ravi R. Iyer (Ravishankar R. Iyer) [6] [7]
13Manoj Khare [8] [9]
14Steve Kulick [8]
15Victor W. Lee [10]
16Lily Pao Looi [8] [9]
17Rabi N. Mahapatra [1]
18Phanindra K. Mannava [3] [10]
19Chitra Natarajan [8]
20Seungjoon Park [10]
21 Prakash [13]
22Anuj Prakash [12]
23Sivakumar Radhakrishnan [8]
24Linda Rankin [8]
25Ravi Shankar [12] [13]
26Manoj Kumar Tiwari (M. K. Tiwari) [12] [13]
27Finn Tseng [17]
28Hu-Jun Wang [6] [7]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)