| 2008 |
|---|
| 10 | EE | Suman Kalyan Mandal,
Praveen Bhojwani,
Saraju P. Mohanty,
Rabi N. Mahapatra:
IntellBatt: towards smarter battery design.
DAC 2008: 872-877 |
| 9 | EE | Jason D. Lee,
Nikhil Gupta,
Praveen Bhojwani,
Rabi N. Mahapatra:
An On-Demand Test Triggering Mechanism for NoC-Based Safety-Critical Systems.
ISQED 2008: 184-189 |
| 8 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Robust Concurrent Online Testing of Network-on-Chip-Based SoCs.
IEEE Trans. VLSI Syst. 16(9): 1199-1209 (2008) |
| 2007 |
|---|
| 7 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
A Robust Protocol for Concurrent On-Line Test (COLT) of NoC-based Systems-on-a-Chip.
DAC 2007: 670-675 |
| 6 | EE | Jason D. Lee,
Praveen Bhojwani,
Rabi N. Mahapatra:
A Safety Analysis Framework for COTS Microprocessors in Safety-Critical Applications.
HASE 2007: 407-408 |
| 5 | EE | Praveen Bhojwani,
Jason D. Lee,
Rabi N. Mahapatra:
SAPP: scalable and adaptable peak power management in nocs.
ISLPED 2007: 340-345 |
| 4 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
An Infrastructure IP for Online Testing of Network-on-Chip Based SoCs.
ISQED 2007: 867-872 |
| 2006 |
|---|
| 3 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Core Network Interface Architecture and Latency Constrained On-Chip Communication.
ISQED 2006: 358-363 |
| 2005 |
|---|
| 2 | EE | Praveen Bhojwani,
Rabi N. Mahapatra,
Eun Jung Kim,
Thomas Chen:
A Heuristic for Peak Power Constrained Design of Network-on-Chip (NoC) Based Multimode Systems.
VLSI Design 2005: 124-129 |
| 2003 |
|---|
| 1 | EE | Praveen Bhojwani,
Rabi N. Mahapatra:
Interfacing Cores with On-chip Packet-Switched Networks.
VLSI Design 2003: 382-387 |
