2005 |
6 | EE | Tim Fox,
Lou Covey,
Susan Mack,
David Heacock,
Ed P. Huijbregts,
Vess Johnson,
Avner Kornfeld,
Andrew Yang,
Paul S. Zuchowski:
Should our power approach be current?
DAC 2005: 611 |
2003 |
5 | EE | Raymond X. Nijssen,
Ed P. Huijbregts:
A complete design for power methodology and flow for large ASICs.
ISPD 2003: 106-108 |
1994 |
4 | EE | Hua Xue,
Ed P. Huijbregts,
Jochen A. G. Jess:
Routing for Manufacturability.
DAC 1994: 402-406 |
3 | | Ed P. Huijbregts,
Jos T. J. van Eijndhoven,
Jochen A. G. Jess:
On Design Rule Correct Maze Routing.
EDAC-ETC-EUROASIC 1994: 407-411 |
1993 |
2 | | Ed P. Huijbregts,
Jochen A. G. Jess:
A Multiple Terminal Net Routing Algorithm Using Failure Prediction.
VLSI Design 1993: 84-89 |
1 | EE | Ed P. Huijbregts,
Jochen A. G. Jess:
General gate array routing using a k-terminal net routing algorithm with failure prediction.
IEEE Trans. VLSI Syst. 1(4): 473-481 (1993) |