| 1996 |
|---|
| 3 | EE | Michel R. C. M. Berkelaar,
Pim H. W. Buurman,
Jochen A. G. Jess:
Computing the entire active area/power consumption versus delay tradeoff curve for gate sizing with a piecewise linear simulator.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(11): 1424-1434 (1996) |
| 1994 |
|---|
| 2 | EE | Michel R. C. M. Berkelaar,
Pim H. W. Buurman,
Jochen A. G. Jess:
Computing the entire active area/power consumption versus delay trade-off curve for gate sizing with a piecewise linear simulator.
ICCAD 1994: 474-480 |
| 1993 |
|---|
| 1 | | Hans Fleurkens,
Pim H. W. Buurman:
Flexible Mixed-mode and Mixed-level Simulation.
ISCAS 1993: 2137-2140 |
