| |
| 1997 | ||
|---|---|---|
| 2 | EE | Y. Takei, A. Onozawat, K. Kawaitt, H. Kitazawa: An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs. Great Lakes Symposium on VLSI 1997: 2-7 |
| 1987 | ||
| 1 | EE | T. Watanabe, H. Kitazawa, Y. Sugiyama: A Parallel Adaptable Routing Algorithm and its Implementation on a Two-Dimensional Array Processor. IEEE Trans. on CAD of Integrated Circuits and Systems 6(2): 241-250 (1987) |
| 1 | K. Kawaitt | [2] |
| 2 | A. Onozawat | [2] |
| 3 | Y. Sugiyama | [1] |
| 4 | Y. Takei | [2] |
| 5 | T. Watanabe | [1] |