Wilhelmus A. M. Van Noije

2008
15	EE	Jorge Oliveros, Dwight Cabrera, Elkim Roa, Wilhelmus A. M. Van Noije: An improved and automated design tool for the optimization of CMOS OTAs using geometric programming. SBCCI 2008: 146-151
14	EE	Juan Mateus, Elkim Roa, Hugo Daniel Hernández, Wilhelmus A. M. Van Noije: A 2.7ua sub1-v voltage reference. SBCCI 2008: 81-84
2007
13	EE	Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz Dual Modulus Prescaler Using the E-TSPC Technique and Double Data Throughput Structures. ISCAS 2007: 1895-1898
12	EE	Hugo Daniel Hernández, Wilhelmus A. M. Van Noije, Elkim Roa, João Navarro Jr.: A small area 8bits 50MHz CMOS DAC for bluetooth transmitter. SBCCI 2007: 10-15
11	EE	Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4.1 GHz prescaler using double data throughput E-TSPC structures. SBCCI 2007: 123-127
2006
10	EE	A. J. Aragao, João Navarro Jr., Wilhelmus A. M. Van Noije: Mismatch effect analyses in CMOS tapered buffers. ISCAS 2006
2005
9	EE	Angel M. Gómez Argüello, João Navarro Jr., Wilhelmus A. M. Van Noije: A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer. SBCCI 2005: 144-148
2004
8	EE	Fernando P. H. de Miranda, João Navarro Jr., Wilhelmus A. M. Van Noije: A 4 GHz dual modulus divider-by 32/33 prescaler in 0.35m CMOS technology. SBCCI 2004: 94-99
2003
7	EE	Elkim Roa, Joao Navarro Soares, Wilhelmus A. M. Van Noije: A Methodology for CMOS Low Noise Ampli.er Design. SBCCI 2003: 14-19
2002
6	EE	João Navarro Jr., Wilhelmus A. M. Van Noije: Extended TSPC structures with double input/output data throughput for gigahertz CMOS circuit design. IEEE Trans. VLSI Syst. 10(3): 301-308 (2002)
2001
5		Augusto Ken Morita, Marcio Toma, Wilhelmus A. M. Van Noije: Implementação de Um Sistema de Decriptografia para Controle Bancário em Hardware tipo FPGA. RITA 8(1): 63-81 (2001)
2000
4	EE	Marco Antonio Dal Poz, J. Aedo Cobo, Wilhelmus A. M. Van Noije, Marcelo Knörich Zuffo: A Simple RISC Microprocessor Core Designed for Digital Set-Top-Box Applications. ASAP 2000: 35-
1998
3	EE	João Navarro Jr., Wilhelmus A. M. Van Noije: Design of an 8: 1 MUX at 1.7Gbit/s in 0.8?I`m CMOS Technology. Great Lakes Symposium on VLSI 1998: 103-107
2	EE	João Navarro Jr., Wilhelmus A. M. Van Noije: CMOS Tapered Buffer Design for Small Width Clock/Data Signal Propagation. Great Lakes Symposium on VLSI 1998: 89-94
1997
1	EE	João Navarro Jr., Reinaldo Silveira, Fábio L. Romao, Wilhelmus A. M. Van Noije: A 1.4 Gbit/s CMOS driver for 50 /spl Omega/ ECL systems. Great Lakes Symposium on VLSI 1997: 14-

Coauthor Index

1	A. J. Aragao	[10]
2	Angel M. Gómez Argüello	[9]
3	Dwight Cabrera	[15]
4	J. Aedo Cobo	[4]
5	Hugo Daniel Hernández	[12] [14]
6	Juan Mateus	[14]
7	Fernando P. H. de Miranda	[8] [11] [13]
8	Augusto Ken Morita	[5]
9	João Navarro Jr.	[1] [2] [3] [6] [8] [9] [10] [11] [12] [13]
10	Jorge Oliveros	[15]
11	Marco Antonio Dal Poz	[4]
12	Elkim Roa	[7] [12] [14] [15]
13	Fábio L. Romao	[1]
14	Reinaldo Silveira	[1]
15	Joao Navarro Soares	[7]
16	Marcio Toma	[5]
17	Marcelo Knörich Zuffo	[4]

Colors in the list of coauthors