2008 |
38 | EE | Qingquan Zhang,
Yu Gu,
Tian He,
Gerald E. Sobelman:
Cscan: A Correlation-based Scheduling Algorithm for Wireless Sensor Networks.
ICNSC 2008: 1025-1030 |
37 | EE | Sangmin Kim,
Gerald E. Sobelman,
Hanho Lee:
Adaptive quantization in min-sum based irregular LDPC decoder.
ISCAS 2008: 536-539 |
2007 |
36 | EE | Wen-Chih Kan,
Gerald E. Sobelman:
MIMO Transceiver Design Based on a Modified Geometric Mean Decomposition.
ISCAS 2007: 677-680 |
2006 |
35 | EE | Kai-Chuan Chang,
Gerald E. Sobelman:
FPGA-Based Design of a Pulsed-OFDM System.
APCCAS 2006: 1128-1131 |
34 | EE | Fakhrul Zaman Rokhani,
Gerald E. Sobelman:
Low-Power Bus Transform Coding for Multilevel Signals.
APCCAS 2006: 1272-1275 |
33 | EE | Kai-Chuan Chang,
Gerald E. Sobelman:
Noise Model Analysis of Optimized Mixed-Radix Structures for Pulsed OFDM.
GLOBECOM 2006 |
32 | EE | Daewook Kim,
Manho Kim,
Gerald E. Sobelman:
DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs.
ISCAS 2006 |
31 | EE | Ming-Ta Hsieh,
Gerald E. Sobelman:
Modeling and verification of high-speed wired links with Verilog-AMS.
ISCAS 2006 |
30 | EE | Daewook Kim,
Manho Kim,
Gerald E. Sobelman:
NIUGAP: low latency network interface architecture with Gray code for networks-on-chip.
ISCAS 2006 |
29 | EE | Manho Kim,
Daewook Kim,
Gerald E. Sobelman:
Network-on-chip link analysis under power and performance constraints.
ISCAS 2006 |
28 | EE | Manho Kim,
Daewook Kim,
Gerald E. Sobelman:
Network-on-chip quality-of-service through multiprotocol label switching.
ISCAS 2006 |
27 | EE | Qingquan Zhang,
Gerald E. Sobelman,
Tian He:
Gradient-Driven Target Acquisition in Mobile Wireless Sensor Networks.
MSN 2006: 365-376 |
26 | EE | Qingquan Zhang,
Woong Cho,
Gerald E. Sobelman,
Liuqing Yang,
Richard M. Voyles:
TwinsNet: A Cooperative MIMO Mobile Sensor Network.
UIC 2006: 508-516 |
25 | EE | Ebrahim Saberinia,
K. C. Chang,
Gerald E. Sobelman,
Ahmed H. Tewfik:
Implementation of a Multi-band Pulsed-OFDM Transceiver.
VLSI Signal Processing 43(1): 73-88 (2006) |
2005 |
24 | EE | Daewook Kim,
Manho Kim,
Gerald E. Sobelman:
FPGA-Based CDMA Switch for Networks-on-Chip.
FCCM 2005: 283-284 |
23 | EE | Daewook Kim,
Manho Kim,
Gerald E. Sobelman:
Parallel FFT computation with a CDMA-based network-on-chip.
ISCAS (2) 2005: 1138-1141 |
22 | EE | Ming-Ta Hsieh,
Gerald E. Sobelman:
Clock and data recovery with adaptive loop gain for spread spectrum SerDes applications.
ISCAS (5) 2005: 4883-4886 |
2004 |
21 | | Kavitha Seshadri,
Adrianne Pontarelli,
Gauri Joglekar,
Gerald E. Sobelman:
Design techniques for Pulsed Static CMOS.
ISCAS (2) 2004: 929-932 |
20 | | Kai-Chuan Chang,
Gerald E. Sobelman,
Ebrahim Saberinia,
Ahmed H. Tewfik:
Analysis of higher-order N-tone sigma-delta modulators for ultra wideband communications.
ISCAS (4) 2004: 113-116 |
19 | | Ming-Ta Hsieh,
Gerald E. Sobelman:
Simultaneous bidirectional signaling with adaptive pre-emphasis.
ISCAS (4) 2004: 397-400 |
18 | EE | Hanho Lee,
Gerald E. Sobelman:
VLSI Design Of Digit-Serial FPGA Architecture.
Journal of Circuits, Systems, and Computers 13(1): 17-52 (2004) |
2002 |
17 | EE | Gunok Jung,
V. A. Sundarajan,
Gerald E. Sobelman:
A robust self-resetting CMOS 32-bit parallel adder.
ISCAS (1) 2002: 473-476 |
16 | EE | Gunok Jung,
Jun Jin Kong,
Gerald E. Sobelman,
Keshab K. Parhi:
High-speed add-compare-select units using locally self-resetting CMOS.
ISCAS (1) 2002: 889-892 |
15 | EE | Sungwook Kim,
Gerald E. Sobelman:
Efficient digit-serial FIR filters with skew-tolerant domino.
ISCAS (4) 2002: 369-372 |
1999 |
14 | EE | Lijun Gao,
Sarvesh Shrivastava,
Gerald E. Sobelman:
Elliptic Curve Scalar Multiplier Design Using FPGAs.
CHES 1999: 257-268 |
13 | EE | Lijun Gao,
Sarvesh Shrivastava,
Hanho Lee,
Gerald E. Sobelman:
A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor.
FCCM 1999: 304-305 |
1998 |
12 | EE | Hanho Lee,
Gerald E. Sobelman:
Digit-Serial DSP Library for Optimized FPGA Configuration.
FCCM 1998: 322-323 |
11 | EE | Hanho Lee,
Sarvesh Shrivastava,
Gerald E. Sobelman:
FPGA Logic Block Architecture for Digit-Serial DSP Applications (Abstract).
FPGA 1998: 257 |
1997 |
10 | EE | Hanho Lee,
Gerald E. Sobelman:
A New Low-Voltage Full Adder Circuit.
Great Lakes Symposium on VLSI 1997: 88- |
1995 |
9 | | Gerald E. Sobelman,
Donovan L. Raatz:
Low-Power Multiplier Design Using Delayed Evaluation.
ISCAS 1995: 1564-1567 |
1993 |
8 | EE | Ross Smith,
Gerald E. Sobelman,
George Luk,
Koichi Suda,
Jeff Bracken:
A programmable floating-point cell for systolic signal processing.
VLSI Signal Processing 5(1): 75-83 (1993) |
1991 |
7 | EE | E. Vandris,
Gerald E. Sobelman:
Algorithms for Fast, Memory Efficient Switch-Level Fault Simulation.
DAC 1991: 138-143 |
6 | | E. Vandris,
Gerald E. Sobelman:
A Mixed Functional/IDDQ Testing Methodology for CMOS Transistor Faults.
ITC 1991: 608-614 |
5 | EE | Rob Smith,
Gerald E. Sobelman:
Simulation-based design of programmable systolic arrays.
Computer-Aided Design 23(10): 669-675 (1991) |
1990 |
4 | | E. Vandris,
Gerald E. Sobelman:
Fast Switch-Level Fault Simulation Using Functional Fault Modeling.
ICCAD 1990: 74-77 |
1986 |
3 | EE | David E. Krekelberg,
Eugene Shragowitz,
Gerald E. Sobelman,
Li-Shin Lin:
Automated layout synthesis in the YASC silicon compiler.
DAC 1986: 447-453 |
1985 |
2 | EE | David E. Krekelberg,
Gerald E. Sobelman,
Chu S. Jhon:
Yet another silicon compiler.
DAC 1985: 176-182 |
1984 |
1 | EE | O. Melstrand,
Eamonn O'Neill,
Gerald E. Sobelman,
D. Dokos:
A Data Base Driven Automated System for MOS Device Characterization, Parameter Optimization and Modeling.
IEEE Trans. on CAD of Integrated Circuits and Systems 3(1): 47-51 (1984) |