2008 |
23 | EE | Eugenia G. Giannopoulou,
Giorgos Lepouras,
Elias S. Manolakos:
VIP: Visualization of integrated proteomics data.
BIBE 2008: 1-8 |
22 | EE | Stavroula Ventoura,
Eugenia G. Giannopoulou,
Elias S. Manolakos:
ProtCV: A Tool for Extracting, Visualizing and Validating Protein Clusters Using Mass Spectra Peak-Lists.
CBMS 2008: 221-223 |
21 | EE | Kimon Karras,
Elias S. Manolakos:
An embedded dynamically self-reconfigurable Master-Slaves MPSoC architecture.
FPL 2008: 431-434 |
2004 |
20 | EE | Demetris G. Galatopoullos,
Andrew P. Funk,
Elias S. Manolakos:
Integrating Java and Matlab Components into the Same Parallel and Distributed Application Using JavaPorts.
IPDPS 2004 |
2003 |
19 | EE | Christophe Molina,
Elias S. Manolakos:
Guest Editors' Introduction.
VLSI Signal Processing 35(3): 227-228 (2003) |
18 | EE | Lucio Andrade,
Elias S. Manolakos:
Signal Background Estimation and Baseline Correction Algorithms for Accurate DNA Sequencing.
VLSI Signal Processing 35(3): 229-243 (2003) |
2001 |
17 | | Laurie A. Smith King,
Heather Quinn,
Miriam Leeser,
Demetris G. Galatopoullos,
Elias S. Manolakos:
Run-Time Execution of Reconfigurable Hardware in a Java Environment.
ICCD 2001: 380-387 |
16 | EE | Elias S. Manolakos,
Demetris G. Galatopoullos,
Andrew P. Funk:
Component-Based Peer-to-Peer Distributed Processing in Heterogeneous Networks Using JAVA PORTS.
NCA 2001: 234-237 |
15 | EE | José Fridman,
Elias S. Manolakos:
Distributed Memory Parallel Architecture Based on Modular Linear Arrays for 2-D Separable Transforms Computation.
VLSI Signal Processing 28(3): 187-203 (2001) |
2000 |
14 | EE | Andrew Stone,
Elias S. Manolakos:
Minimal Complexity Hierarchical Loop Representations of SFG Processors for Optimal High Level Synthesis.
ASAP 2000: 92-102 |
13 | | Manuela S. Pereira,
Lucio Andrade,
Sameh El Difrawy,
Barry L. Karger,
Elias S. Manolakos:
Statistical learning formulation of the DNA base-calling problem and its solution in a Bayesian EM framework.
Discrete Applied Mathematics 104(1-3): 229-258 (2000) |
12 | | Elias S. Manolakos,
Haris M. Stellakis:
Systematic synthesis of parallel architectures for the real-time estimation of higher order statistical moments.
Parallel Algorithms Appl. 15(1-2): 77-111 (2000) |
11 | | Elias S. Manolakos,
Haris M. Stellakis:
Systematic synthesis of parallel architectures for the computation of higher order cumulants.
Parallel Computing 26(5): 655-676 (2000) |
10 | EE | Elias S. Manolakos,
Wayne Burleson:
Guest Editor's Introduction.
VLSI Signal Processing 24(1): 5-6 (2000) |
9 | EE | Andrew Stone,
Elias S. Manolakos:
DG2VHDL: A Tool to Facilitate the High Level Synthesis of Parallel Processing Array Architectures.
VLSI Signal Processing 24(1): 99-120 (2000) |
1999 |
8 | | Demetris G. Galatopoullos,
Elias S. Manolakos:
Developing Parallel Applications Using the JAVAPORTS Environment.
IPPS/SPDP Workshops 1999: 813-828 |
7 | | Elias S. Manolakos,
Demetris G. Galatopoullos:
JavaPorts: An Environment to Facilitate Parallel Computing on a Heterogeneous Cluster of Workstations.
Informatica (Slovenia) 23(1): (1999) |
1997 |
6 | EE | Karen Panetta Lentz,
Elias S. Manolakos,
Edward C. Czeck:
A multiple domain environment for efficient simulation.
Annual Simulation Symposium 1997: 76-85 |
5 | EE | Karen Panetta Lentz,
Elias S. Manolakos,
Edward C. Czeck,
Jamie A. Heller:
Multiple Experiment Environments for Testing.
J. Electronic Testing 11(3): 247-262 (1997) |
1995 |
4 | EE | Karen Panetta Lentz,
Elias S. Manolakos,
Edward C. Czeck:
On the simulation of Multiple Stuck-at Faults using Multiple Domain Concurrent and Comparative Simulation.
Asian Test Symposium 1995: 86-92 |
1993 |
3 | | Hussain Al-Asaad,
Elias S. Manolakos:
A Two-Phase Reconfiguration Strategy for Extracting Linear Arrays Out of Two-Dimensional Architectures.
DFT 1993: 56-63 |
2 | | Haris M. Stellakis,
Elias S. Manolakos:
Time- and Order-recursive Estimation of Higher Order Moments in a Linear Array.
ISCAS 1993: 1730-1733 |
1991 |
1 | | Elias S. Manolakos,
Haris M. Stellakis,
Dana H. Brooks:
Parallel Processing for Biomedical Signal Processing.
IEEE Computer 24(3): 33-43 (1991) |