| 2000 |
|---|
| 8 | EE | Marwan A. Gharaybeh,
Vishwani D. Agrawal,
Michael L. Bushnell,
Carlos G. Parodi:
False-Path Removal Using Delay Fault Simulation.
J. Electronic Testing 16(5): 463-476 (2000) |
| 1998 |
|---|
| 7 | EE | Marwan A. Gharaybeh,
Vishwani D. Agrawal,
Michael L. Bushnell:
False-Path Removal Using Delay Fault Simulation.
Asian Test Symposium 1998: 82-87 |
| 6 | EE | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
The path-status graph with application to delay fault simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 324-332 (1998) |
| 5 | EE | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
A parallel-vector concurrent-fault simulator and generation of single-input-change tests for path-delay faults.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 873-876 (1998) |
| 1997 |
|---|
| 4 | EE | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
Classification and Test Generation for Path-Delay Faults Using Single Struck-at Fault Tests.
J. Electronic Testing 11(1): 55-67 (1997) |
| 1996 |
|---|
| 3 | | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
An Exact Non-Enumerative Fault Simulator for Path-Delay Faults.
ITC 1996: 276-285 |
| 2 | EE | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
Parallel concurrent path-delay fault simulation using single-input change patterns.
VLSI Design 1996: 426-431 |
| 1995 |
|---|
| 1 | | Marwan A. Gharaybeh,
Michael L. Bushnell,
Vishwani D. Agrawal:
Classification and Test Generation for Path-Delay Faults Using Single Stuck-Fault Tests.
ITC 1995: 139-148 |
