2008 |
15 | EE | Eduardo Aguilar-Pelaez,
Esther Rodríguez-Villegas:
Low-power differential photoplethysmographic pulse transit time detector for ambulatory cardiovascular monitoring.
ISCAS 2008: 1104-1107 |
14 | EE | Alexander J. Casson,
Esther Rodríguez-Villegas:
An inverse filter realisation of a single scale Inverse continuous wavelet transform.
ISCAS 2008: 904-907 |
2007 |
13 | EE | David C. Yates,
Alexander J. Casson,
Esther Rodríguez-Villegas:
Low Power Technology for Wearable Cognition Systems.
HCI (16) 2007: 127-136 |
2005 |
12 | EE | Aleksandra Rankov,
Esther Rodríguez-Villegas,
Michael J. Lee:
A novel correlated double sampling poly-Si circuit for readout systems in large area X-ray sensors.
ISCAS (1) 2005: 728-731 |
11 | EE | Phil Corbishley,
Esther Rodríguez-Villegas:
Programmable switched-current floating-gate cells.
ISCAS (2) 2005: 1398-1401 |
10 | EE | Esther Rodríguez-Villegas:
A 0.8 V, 360 nW Gm-C biquad based on FGMOS transistors [biquadratic filter].
ISCAS (3) 2005: 2156-2159 |
9 | EE | Esther Rodríguez-Villegas:
A 0.9 V offset compensated FGMOS comparator.
ISCAS (3) 2005: 2160-2163 |
2004 |
8 | | Phil Corbishley,
Esther Rodríguez-Villegas,
Chris Toumazou:
An ultra-low power analogue directionality system for digital hearing aids.
ISCAS (1) 2004: 233-236 |
2003 |
7 | EE | Esther Rodríguez-Villegas,
Alberto Yufera,
Adoración Rueda:
A Charge Correction Cell for FGMOS-Based Circuits.
SBCCI 2003: 191- |
2002 |
6 | EE | Esther Rodríguez-Villegas,
Adoración Rueda,
Alberto Yufera:
A micropower log domain FGMOS filter.
ISCAS (3) 2002: 317-320 |
5 | EE | Maria J. Avedillo,
José M. Quintana,
Esther Rodríguez-Villegas:
Simple parallel weighted order statistic filter implementations.
ISCAS (4) 2002: 607-610 |
4 | EE | Esther Rodríguez-Villegas,
José M. Quintana,
Maria J. Avedillo,
Adoración Rueda:
High-speed low-power logic gates using floating gates.
ISCAS (5) 2002: 389-392 |
2001 |
3 | EE | José M. Quintana,
Maria J. Avedillo,
Raúl Jiménez,
Esther Rodríguez-Villegas:
Practical low-cost CPL implementations threshold logic functions.
ACM Great Lakes Symposium on VLSI 2001: 139-144 |
2 | EE | Esther Rodríguez-Villegas,
Adoración Rueda,
Alberto Yufera:
A 1.25 V FGMOS filter using translinear circuits.
ISCAS (1) 2001: 61-64 |
1999 |
1 | EE | Esther Rodríguez-Villegas,
Maria J. Avedillo,
José M. Quintana,
Gloria Huertas,
Adoración Rueda:
vMOS-based sorters for multiplier implementations.
ISCAS (1) 1999: 338-341 |